From 10f05e3b24318b639abdbf518d28321b0a7ccf40 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Thu, 26 Mar 2015 07:18:57 +0000 Subject: [PATCH] Added read back of the setting for the block generator. --- applications/unb1_reorder/tb/python/tc_unb1_reorder.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/applications/unb1_reorder/tb/python/tc_unb1_reorder.py b/applications/unb1_reorder/tb/python/tc_unb1_reorder.py index fb935c5804..fb8df72ff9 100644 --- a/applications/unb1_reorder/tb/python/tc_unb1_reorder.py +++ b/applications/unb1_reorder/tb/python/tc_unb1_reorder.py @@ -163,6 +163,9 @@ if __name__ == "__main__": # Write setting for the block generator: bg.write_block_gen_settings(samplesPerPacket=c_frame_size, blocksPerSync=g_nof_blocks, gapSize=c_gap_size, memLowAddr=0, memHighAddr=c_bg_ram_size-1, BSNInit=10) + # Read back the setting for the block generator: + bg.read_block_gen_settings() + # Write the stimuli to the block generator and enable the block generator if c_write_block_gen == True: for i in range(c_bg_nof_streams): @@ -180,7 +183,7 @@ if __name__ == "__main__": bg_data = flatten(bg_data) # Enable the blockgenerator - bg.write_enable() + bg.write_enable() # Wait until the DDR3 model is initialized. if tc.sim == True: -- GitLab