diff --git a/applications/unb1_reorder/tb/python/tc_unb1_reorder.py b/applications/unb1_reorder/tb/python/tc_unb1_reorder.py
index fb935c5804173b583b0ede8acec9fffdac1ab8ea..fb8df72ff9a9397e5fe5116a6df7a5b98fabf9f2 100644
--- a/applications/unb1_reorder/tb/python/tc_unb1_reorder.py
+++ b/applications/unb1_reorder/tb/python/tc_unb1_reorder.py
@@ -163,6 +163,9 @@ if __name__ == "__main__":
     # Write setting for the block generator:
     bg.write_block_gen_settings(samplesPerPacket=c_frame_size, blocksPerSync=g_nof_blocks, gapSize=c_gap_size, memLowAddr=0, memHighAddr=c_bg_ram_size-1, BSNInit=10)
     
+    # Read back the setting for the block generator:
+    bg.read_block_gen_settings()
+    
     # Write the stimuli to the block generator and enable the block generator
     if c_write_block_gen == True:
         for i in range(c_bg_nof_streams):
@@ -180,7 +183,7 @@ if __name__ == "__main__":
     bg_data = flatten(bg_data)  
 
     # Enable the blockgenerator
-    bg.write_enable()   
+    bg.write_enable()
     
     # Wait until the DDR3 model is initialized.
     if tc.sim == True: