From 0aa164de96da290fdd25f8219ae5c7007ff850dc Mon Sep 17 00:00:00 2001 From: Eric Kooistra <kooistra@astron.nl> Date: Tue, 29 Nov 2022 09:26:07 +0100 Subject: [PATCH] No functional change, reg_hdr_dat_eth_0 and reg_hdr_dat_eth_1 ports got moved. --- .../src/vhdl/qsys_unb2c_test_pkg.vhd | 28 +++++++++---------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd index 5c579ef596..e61e1499a2 100644 --- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd +++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/qsys_unb2c_test_pkg.vhd @@ -312,6 +312,13 @@ PACKAGE qsys_unb2c_test_pkg IS reg_bsn_monitor_v2_tx_eth_1_writedata_export : out std_logic_vector(31 downto 0); -- export reg_bsn_monitor_v2_tx_eth_1_read_export : out std_logic; -- export reg_bsn_monitor_v2_tx_eth_1_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export + reg_hdr_dat_eth_1_reset_export : out std_logic; -- export + reg_hdr_dat_eth_1_clk_export : out std_logic; -- export + reg_hdr_dat_eth_1_address_export : out std_logic_vector(4 downto 0); -- export + reg_hdr_dat_eth_1_write_export : out std_logic; -- export + reg_hdr_dat_eth_1_writedata_export : out std_logic_vector(31 downto 0); -- export + reg_hdr_dat_eth_1_read_export : out std_logic; -- export + reg_hdr_dat_eth_1_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export reg_strobe_total_count_rx_eth_1_reset_export : out std_logic; -- export reg_strobe_total_count_rx_eth_1_clk_export : out std_logic; -- export reg_strobe_total_count_rx_eth_1_address_export : out std_logic_vector(4 downto 0); -- export @@ -340,6 +347,13 @@ PACKAGE qsys_unb2c_test_pkg IS reg_bsn_monitor_v2_tx_eth_0_writedata_export : out std_logic_vector(31 downto 0); -- export reg_bsn_monitor_v2_tx_eth_0_read_export : out std_logic; -- export reg_bsn_monitor_v2_tx_eth_0_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export + reg_hdr_dat_eth_0_reset_export : out std_logic; -- export + reg_hdr_dat_eth_0_clk_export : out std_logic; -- export + reg_hdr_dat_eth_0_address_export : out std_logic_vector(6 downto 0); -- export + reg_hdr_dat_eth_0_write_export : out std_logic; -- export + reg_hdr_dat_eth_0_writedata_export : out std_logic_vector(31 downto 0); -- export + reg_hdr_dat_eth_0_read_export : out std_logic; -- export + reg_hdr_dat_eth_0_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export reg_strobe_total_count_rx_eth_0_reset_export : out std_logic; -- export reg_strobe_total_count_rx_eth_0_clk_export : out std_logic; -- export reg_strobe_total_count_rx_eth_0_address_export : out std_logic_vector(6 downto 0); -- export @@ -368,20 +382,6 @@ PACKAGE qsys_unb2c_test_pkg IS reg_fpga_voltage_sens_writedata_export : out std_logic_vector(31 downto 0); -- export reg_fpga_voltage_sens_read_export : out std_logic; -- export reg_fpga_voltage_sens_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export - reg_hdr_dat_eth_0_reset_export : out std_logic; -- export - reg_hdr_dat_eth_0_clk_export : out std_logic; -- export - reg_hdr_dat_eth_0_address_export : out std_logic_vector(6 downto 0); -- export - reg_hdr_dat_eth_0_write_export : out std_logic; -- export - reg_hdr_dat_eth_0_writedata_export : out std_logic_vector(31 downto 0); -- export - reg_hdr_dat_eth_0_read_export : out std_logic; -- export - reg_hdr_dat_eth_0_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export - reg_hdr_dat_eth_1_reset_export : out std_logic; -- export - reg_hdr_dat_eth_1_clk_export : out std_logic; -- export - reg_hdr_dat_eth_1_address_export : out std_logic_vector(4 downto 0); -- export - reg_hdr_dat_eth_1_write_export : out std_logic; -- export - reg_hdr_dat_eth_1_writedata_export : out std_logic_vector(31 downto 0); -- export - reg_hdr_dat_eth_1_read_export : out std_logic; -- export - reg_hdr_dat_eth_1_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export reg_heater_reset_export : out std_logic; -- export reg_heater_clk_export : out std_logic; -- export reg_heater_address_export : out std_logic_vector(4 downto 0); -- export -- GitLab