diff --git a/libraries/technology/ip_stratixiv/hdllib.cfg b/libraries/technology/ip_stratixiv/hdllib.cfg
index a5d324b4ec069de5dd741fbeaafe4e815843e071..9efe515b292916f36bf9b92405c7953adf7f8004 100644
--- a/libraries/technology/ip_stratixiv/hdllib.cfg
+++ b/libraries/technology/ip_stratixiv/hdllib.cfg
@@ -28,9 +28,9 @@ synth_files =
     ip_stratixiv_gxb_reconfig_12.vhd
     ip_stratixiv_gxb_reconfig.vhd
     
-    ip_stratixiv_hssi_gx_generic.vhd
-    ip_stratixiv_hssi_tx_generic.vhd
-    ip_stratixiv_hssi_rx_generic.vhd
+    ip_stratixiv_hssi_gx_32b_generic.vhd
+    ip_stratixiv_hssi_tx_32b_generic.vhd
+    ip_stratixiv_hssi_rx_32b_generic.vhd
     ip_stratixiv_hssi_gx_16b.vhd
     ip_stratixiv_hssi_tx_16b.vhd
     ip_stratixiv_hssi_rx_16b.vhd
diff --git a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_generic.vhd b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_32b_generic.vhd
similarity index 99%
rename from libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_generic.vhd
rename to libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_32b_generic.vhd
index 543c3084d7fd833bd6f2ef03322bb0dd651c9aad..bd9764fce9b67ccbde249cc5127f65186842945b 100644
--- a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_generic.vhd
+++ b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_gx_32b_generic.vhd
@@ -4,7 +4,7 @@
 -- MODULE: alt4gxb 
 
 -- ============================================================
--- File Name: ip_stratixiv_hssi_gx.vhd
+-- File Name: ip_stratixiv_hssi_gx_32b_generic.vhd
 -- Megafunction Name(s):
 -- 			alt4gxb
 --
@@ -47,7 +47,7 @@
  LIBRARY technology_lib;
  USE technology_lib.technology_pkg.all;  -- Provides a function to convert a natural to a Mbps string.
 
- ENTITY  ip_stratixiv_hssi_gx_alt4gxb_81na IS 
+ ENTITY  ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na IS 
 	 GENERIC 
 	 (
                 g_mbps                  :       NATURAL;  -- Used to determine unb_mbps_string and multiplier unb_mult
@@ -82,9 +82,9 @@
 		 tx_dataout	:	OUT  STD_LOGIC_VECTOR (0 DOWNTO 0);
 		 tx_digitalreset	:	IN  STD_LOGIC_VECTOR (0 DOWNTO 0) := (OTHERS => '0')
 	 ); 
- END ip_stratixiv_hssi_gx_alt4gxb_81na;
+ END ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na;
 
- ARCHITECTURE RTL OF ip_stratixiv_hssi_gx_alt4gxb_81na IS
+ ARCHITECTURE RTL OF ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na IS
 
          --VARIABLE unb_mbps_string : STRING := "5000 Mbps";
    CONSTANT unb_mbps_string : STRING(1 TO 9) := tech_nat_to_mbps_str(g_mbps);
@@ -2064,14 +2064,14 @@
 		txpmareset => tx_analogreset_out(0)
 	  );
 
- END RTL; --ip_stratixiv_hssi_gx_alt4gxb_81na
+ END RTL; --ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na
 --VALID FILE
 
 
 LIBRARY ieee;
 USE ieee.std_logic_1164.all;
 
-ENTITY ip_stratixiv_hssi_gx_generic IS
+ENTITY ip_stratixiv_hssi_gx_32b_generic IS
 	GENERIC
 	(
                 g_mbps : NATURAL;
@@ -2106,10 +2106,10 @@ ENTITY ip_stratixiv_hssi_gx_generic IS
 		tx_clkout		: OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
 		tx_dataout		: OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
 	);
-END ip_stratixiv_hssi_gx_generic;
+END ip_stratixiv_hssi_gx_32b_generic;
 
 
-ARCHITECTURE RTL OF ip_stratixiv_hssi_gx_generic IS
+ARCHITECTURE RTL OF ip_stratixiv_hssi_gx_32b_generic IS
 
 	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (0 DOWNTO 0);
 	SIGNAL sub_wire1	: STD_LOGIC_VECTOR (3 DOWNTO 0);
@@ -2126,7 +2126,7 @@ ARCHITECTURE RTL OF ip_stratixiv_hssi_gx_generic IS
 
 
 
-	COMPONENT ip_stratixiv_hssi_gx_alt4gxb_81na
+	COMPONENT ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na
 	GENERIC (
                 g_mbps : NATURAL;
 		starting_channel_number		: NATURAL
@@ -2175,7 +2175,7 @@ BEGIN
 	tx_clkout    <= sub_wire10(0 DOWNTO 0);
 	tx_dataout    <= sub_wire11(0 DOWNTO 0);
 
-	ip_stratixiv_hssi_gx_alt4gxb_81na_component : ip_stratixiv_hssi_gx_alt4gxb_81na
+	ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na_component : ip_stratixiv_hssi_gx_32b_generic_alt4gxb_81na
 	GENERIC MAP (
                  g_mbps => g_mbps,
 		starting_channel_number => starting_channel_number
@@ -2425,10 +2425,10 @@ END RTL;
 -- Retrieval info: CONNECT: rx_patterndetect 0 0 4 0 @rx_patterndetect 0 0 4 0
 -- Retrieval info: CONNECT: tx_clkout 0 0 1 0 @tx_clkout 0 0 1 0
 -- Retrieval info: CONNECT: tx_dataout 0 0 1 0 @tx_dataout 0 0 1 0
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx.vhd TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx.ppf TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx.inc FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx.cmp FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx.bsf FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_inst.vhd FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic.ppf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic.cmp FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_gx_32b_generic_inst.vhd FALSE
 -- Retrieval info: LIB_FILE: stratixiv_hssi
diff --git a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_generic.vhd b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_32b_generic.vhd
similarity index 98%
rename from libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_generic.vhd
rename to libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_32b_generic.vhd
index c6995b12d3caa0f4cf8caf7af7c7a493333cb5e1..4878e8fd32c341af93e617b1720e6ba91aee4cd0 100644
--- a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_generic.vhd
+++ b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_rx_32b_generic.vhd
@@ -4,7 +4,7 @@
 -- MODULE: alt4gxb 
 
 -- ============================================================
--- File Name: ip_stratixiv_hssi_rx_generic.vhd
+-- File Name: ip_stratixiv_hssi_rx_32b_generic.vhd
 -- Megafunction Name(s):
 -- 			alt4gxb
 --
@@ -47,7 +47,7 @@
  LIBRARY technology_lib;
  USE technology_lib.technology_pkg.all;  -- Provides a function to convert a natural to a Mbps string.
 
- ENTITY  ip_stratixiv_hssi_rx_generic_alt4gxb_qi67 IS 
+ ENTITY  ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67 IS 
 	 GENERIC 
 	 (
     g_mbps                  : NATURAL;  -- Used to determine unb_mbps_string and multiplier unb_mult
@@ -74,9 +74,9 @@
 		 rx_freqlocked	:	OUT  STD_LOGIC_VECTOR (0 DOWNTO 0);
 		 rx_patterndetect	:	OUT  STD_LOGIC_VECTOR (3 DOWNTO 0)
 	 ); 
- END ip_stratixiv_hssi_rx_generic_alt4gxb_qi67;
+ END ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67;
 
- ARCHITECTURE RTL OF ip_stratixiv_hssi_rx_generic_alt4gxb_qi67 IS
+ ARCHITECTURE RTL OF ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67 IS
 
    CONSTANT unb_mbps_string : STRING(1 TO 9) := tech_nat_to_mbps_str(g_mbps);
    CONSTANT unb_mult : NATURAL := (g_mbps*2)/625;  -- Workaround (division not possible with non-integers): equals (g_mbps/2)/156.25
@@ -1406,14 +1406,14 @@
 		testbussel => wire_receive_pma0_testbussel
 	  );
 
- END RTL; --ip_stratixiv_hssi_rx_generic_alt4gxb_qi67
+ END RTL; --ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67
 --VALID FILE
 
 
 LIBRARY ieee;
 USE ieee.std_logic_1164.all;
 
-ENTITY ip_stratixiv_hssi_rx_generic IS
+ENTITY ip_stratixiv_hssi_rx_32b_generic IS
 	GENERIC
 	(
                 g_mbps : NATURAL;
@@ -1440,10 +1440,10 @@ ENTITY ip_stratixiv_hssi_rx_generic IS
 		rx_freqlocked		: OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
 		rx_patterndetect		: OUT STD_LOGIC_VECTOR (3 DOWNTO 0)
 	);
-END ip_stratixiv_hssi_rx_generic;
+END ip_stratixiv_hssi_rx_32b_generic;
 
 
-ARCHITECTURE RTL OF ip_stratixiv_hssi_rx_generic IS
+ARCHITECTURE RTL OF ip_stratixiv_hssi_rx_32b_generic IS
 
 	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (0 DOWNTO 0);
 	SIGNAL sub_wire1	: STD_LOGIC_VECTOR (3 DOWNTO 0);
@@ -1457,7 +1457,7 @@ ARCHITECTURE RTL OF ip_stratixiv_hssi_rx_generic IS
 
 
 
-	COMPONENT ip_stratixiv_hssi_rx_generic_alt4gxb_qi67
+	COMPONENT ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67
 	GENERIC (
        g_mbps : NATURAL;
 		starting_channel_number		: NATURAL
@@ -1495,7 +1495,7 @@ BEGIN
 	rx_dataout    <= sub_wire7(31 DOWNTO 0);
 	rx_errdetect    <= sub_wire8(3 DOWNTO 0);
 
-	ip_stratixiv_hssi_rx_generic_alt4gxb_qi67_component : ip_stratixiv_hssi_rx_generic_alt4gxb_qi67
+	ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67_component : ip_stratixiv_hssi_rx_32b_generic_alt4gxb_qi67
 	GENERIC MAP (
         g_mbps => g_mbps,
 
@@ -1684,10 +1684,10 @@ END RTL;
 -- Retrieval info: CONNECT: rx_errdetect 0 0 4 0 @rx_errdetect 0 0 4 0
 -- Retrieval info: CONNECT: rx_freqlocked 0 0 1 0 @rx_freqlocked 0 0 1 0
 -- Retrieval info: CONNECT: rx_patterndetect 0 0 4 0 @rx_patterndetect 0 0 4 0
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic.vhd TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic.ppf TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic.inc FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic.cmp TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic.bsf FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_generic_inst.vhd FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic.ppf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic.cmp TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_rx_32b_generic_inst.vhd FALSE
 -- Retrieval info: LIB_FILE: stratixiv_hssi
diff --git a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_generic.vhd b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_32b_generic.vhd
similarity index 98%
rename from libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_generic.vhd
rename to libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_32b_generic.vhd
index 0d276d1f3a2c3924eed83584809dc5abb342411a..5da8d1991cdfeb14b0c9ec69b4fb541c182a3169 100644
--- a/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_generic.vhd
+++ b/libraries/technology/ip_stratixiv/ip_stratixiv_hssi_tx_32b_generic.vhd
@@ -4,7 +4,7 @@
 -- MODULE: alt4gxb 
 
 -- ============================================================
--- File Name: ip_stratixiv_hssi_tx_generic.vhd
+-- File Name: ip_stratixiv_hssi_tx_32b_generic.vhd
 -- Megafunction Name(s):
 -- 			alt4gxb
 --
@@ -48,7 +48,7 @@
  LIBRARY technology_lib;
  USE technology_lib.technology_pkg.all;  -- Provides a function to convert a natural to a Mbps string.
 
- ENTITY  ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4 IS 
+ ENTITY  ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4 IS 
 	 GENERIC 
 	 (
     g_mbps                  : NATURAL;  -- Used to determine unb_mbps_string and multiplier unb_mult
@@ -67,9 +67,9 @@
 		 tx_dataout	:	OUT  STD_LOGIC_VECTOR (0 DOWNTO 0);
 		 tx_digitalreset	:	IN  STD_LOGIC_VECTOR (0 DOWNTO 0) := (OTHERS => '0')
 	 ); 
- END ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4;
+ END ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4;
 
- ARCHITECTURE RTL OF ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4 IS
+ ARCHITECTURE RTL OF ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4 IS
   
    CONSTANT unb_mbps_string : STRING(1 TO 9) := tech_nat_to_mbps_str(g_mbps);
    CONSTANT unb_mult : NATURAL := (g_mbps*2)/625;  -- Workaround (division not possible with non-integers): equals (g_mbps/2)/156.25
@@ -1181,14 +1181,14 @@
 		txpmareset => tx_analogreset_out(0)
 	  );
 
- END RTL; --ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4
+ END RTL; --ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4
 --VALID FILE
 
 
 LIBRARY ieee;
 USE ieee.std_logic_1164.all;
 
-ENTITY ip_stratixiv_hssi_tx_generic IS
+ENTITY ip_stratixiv_hssi_tx_32b_generic IS
   GENERIC(
                 g_mbps : NATURAL
 );
@@ -1205,10 +1205,10 @@ ENTITY ip_stratixiv_hssi_tx_generic IS
 		tx_clkout		: OUT STD_LOGIC_VECTOR (0 DOWNTO 0);
 		tx_dataout		: OUT STD_LOGIC_VECTOR (0 DOWNTO 0)
 	);
-END ip_stratixiv_hssi_tx_generic;
+END ip_stratixiv_hssi_tx_32b_generic;
 
 
-ARCHITECTURE RTL OF ip_stratixiv_hssi_tx_generic IS
+ARCHITECTURE RTL OF ip_stratixiv_hssi_tx_32b_generic IS
 
 	SIGNAL sub_wire0	: STD_LOGIC_VECTOR (0 DOWNTO 0);
 	SIGNAL sub_wire1	: STD_LOGIC_VECTOR (0 DOWNTO 0);
@@ -1216,7 +1216,7 @@ ARCHITECTURE RTL OF ip_stratixiv_hssi_tx_generic IS
 
 
 
-	COMPONENT ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4
+	COMPONENT ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4
 	GENERIC (
      g_mbps : NATURAL
 
@@ -1240,7 +1240,7 @@ BEGIN
 	tx_clkout    <= sub_wire1(0 DOWNTO 0);
 	tx_dataout    <= sub_wire2(0 DOWNTO 0);
 
-	ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4_component : ip_stratixiv_hssi_tx_generic_alt4gxb_dgn4
+	ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4_component : ip_stratixiv_hssi_tx_32b_generic_alt4gxb_dgn4
 	GENERIC MAP (
         g_mbps => g_mbps
 )
@@ -1380,10 +1380,10 @@ END RTL;
 -- Retrieval info: CONNECT: pll_locked 0 0 1 0 @pll_locked 0 0 1 0
 -- Retrieval info: CONNECT: tx_clkout 0 0 1 0 @tx_clkout 0 0 1 0
 -- Retrieval info: CONNECT: tx_dataout 0 0 1 0 @tx_dataout 0 0 1 0
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic.vhd TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic.ppf TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic.inc FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic.cmp FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic.bsf FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_generic_inst.vhd FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic.vhd TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic.ppf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic.inc FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic.cmp FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic.bsf FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL ip_stratixiv_hssi_tx_32b_generic_inst.vhd FALSE
 -- Retrieval info: LIB_FILE: stratixiv_hssi
diff --git a/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd b/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd
index d9e28c3e169d88e8fb7ca1c6538f9fe241262745..0c9f64e8f39d27af3c849c8111bfcc5705a82362 100644
--- a/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd
+++ b/libraries/technology/transceiver/tech_transceiver_gx_stratixiv.vhd
@@ -135,7 +135,7 @@ BEGIN
     gen_tr : IF g_tx = TRUE AND g_rx = TRUE GENERATE  --Generate duplex transceivers
     
       gen_32b : IF g_data_w = 32 GENERATE
-        u_gx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_gx_generic
+        u_gx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_gx_32b_generic
         GENERIC MAP (
           g_mbps                   => g_mbps,
           starting_channel_number  => i*4  --Starting channel numbers must be 0,4,8,12 etc for individual ALTGX instances
@@ -225,7 +225,7 @@ BEGIN
     gen_rx : IF g_tx = FALSE AND g_rx = TRUE GENERATE  --Generate receivers only
 
       gen_32b : IF g_data_w = 32 GENERATE
-        u_rx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_rx_generic
+        u_rx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_rx_32b_generic
         GENERIC MAP (
           g_mbps                   => g_mbps,
           starting_channel_number  => i*4  --Starting channel numbers must be 0,4,8,12 etc for individual ALTGX instances     
@@ -289,7 +289,7 @@ BEGIN
     
     gen_tx : IF g_tx = TRUE AND g_rx = FALSE GENERATE
       gen_32b : IF g_data_w = 32 GENERATE
-        u_tx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_tx_generic
+        u_tx: ENTITY ip_stratixiv_lib.ip_stratixiv_hssi_tx_32b_generic
         GENERIC MAP (
            g_mbps             => g_mbps
         )