diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl b/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
index f353445bb7ab9cb2156b8671ca8a42e2880312b0..2fce2100258cefe5848361703adb2f4c8ec100ac 100644
--- a/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/compile_ip.tcl
@@ -32,7 +32,7 @@ set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_4g_1600/genera
vmap ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150 ./work/
vmap ip_arria10_ddr4_4g_1600_altera_emif_150 ./work/
- vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_3yki4wa.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
+ vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_4thorvi.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_emif_arch_nf_top.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_emif_arch_nf_bufs.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_emif_arch_nf_buf_udir_se_i.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
@@ -61,5 +61,5 @@ vmap ip_arria10_ddr4_4g_1600_altera_emif_150 ./work/
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_emif_arch_nf_regs.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_oct.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
vlog -sv "$IP_DIR/../altera_emif_arch_nf_150/sim/altera_oct_um_fsm.sv" -work ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150
- vlog "$IP_DIR/../altera_emif_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_150_wffzgoq.v" -work ip_arria10_ddr4_4g_1600_altera_emif_150
+ vlog "$IP_DIR/../altera_emif_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_150_nnn2r2a.v" -work ip_arria10_ddr4_4g_1600_altera_emif_150
vcom "$IP_DIR/ip_arria10_ddr4_4g_1600.vhd"
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl b/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
index bf7c3824f0c277b1b48e94e2061828957df546c8..933716aae34cb0cdd1556cc362b22023703570a9 100644
--- a/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/copy_hex_files.tcl
@@ -26,8 +26,8 @@ set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/ddr4_4g_1600/generate
# Copy ROM/RAM files to simulation directory
if {[file isdirectory $IP_DIR]} {
- file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_3yki4wa_seq_cal_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_3yki4wa_seq_cal_synth.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_3yki4wa_seq_params_sim.hex ./
- file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_3yki4wa_seq_params_synth.hex ./
-}
\ No newline at end of file
+ file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_4thorvi_seq_cal_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_4thorvi_seq_cal_synth.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_4thorvi_seq_params_sim.hex ./
+ file copy -force $IP_DIR/../altera_emif_arch_nf_150/sim/ip_arria10_ddr4_4g_1600_altera_emif_arch_nf_150_4thorvi_seq_params_synth.hex ./
+}
diff --git a/libraries/technology/ip_arria10/ddr4_4g_1600/ip_arria10_ddr4_4g_1600.qsys b/libraries/technology/ip_arria10/ddr4_4g_1600/ip_arria10_ddr4_4g_1600.qsys
index 4893bdadb8d073436bca4630e3fdbe7cdee5cd7d..5d3cf7df7b7f330e1266e1b0fccef3a438b629db 100644
--- a/libraries/technology/ip_arria10/ddr4_4g_1600/ip_arria10_ddr4_4g_1600.qsys
+++ b/libraries/technology/ip_arria10/ddr4_4g_1600/ip_arria10_ddr4_4g_1600.qsys
@@ -47,8 +47,8 @@
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface
- name="ctrl_amm_avalon_slave_0"
- internal="emif_0.ctrl_amm_avalon_slave_0"
+ name="ctrl_amm_0"
+ internal="emif_0.ctrl_amm_0"
type="avalon"
dir="end">
<port name="amm_ready_0" internal="amm_ready_0" />
@@ -61,32 +61,29 @@
<port name="amm_byteenable_0" internal="amm_byteenable_0" />
<port name="amm_readdatavalid_0" internal="amm_readdatavalid_0" />
</interface>
+ <interface name="ctrl_mmr_slave_0" internal="emif_0.ctrl_mmr_slave_0" />
<interface
- name="emif_usr_clk_clock_source"
- internal="emif_0.emif_usr_clk_clock_source"
+ name="emif_usr_clk"
+ internal="emif_0.emif_usr_clk"
type="clock"
dir="start">
<port name="emif_usr_clk" internal="emif_usr_clk" />
</interface>
<interface
- name="emif_usr_reset_reset_source"
- internal="emif_0.emif_usr_reset_reset_source"
+ name="emif_usr_reset_n"
+ internal="emif_0.emif_usr_reset_n"
type="reset"
dir="start">
<port name="emif_usr_reset_n" internal="emif_usr_reset_n" />
</interface>
<interface
- name="global_reset_reset_sink"
- internal="emif_0.global_reset_reset_sink"
+ name="global_reset_n"
+ internal="emif_0.global_reset_n"
type="reset"
dir="end">
<port name="global_reset_n" internal="global_reset_n" />
</interface>
- <interface
- name="mem_conduit_end"
- internal="emif_0.mem_conduit_end"
- type="conduit"
- dir="end">
+ <interface name="mem" internal="emif_0.mem" type="conduit" dir="end">
<port name="mem_ck" internal="mem_ck" />
<port name="mem_ck_n" internal="mem_ck_n" />
<port name="mem_a" internal="mem_a" />
@@ -104,25 +101,17 @@
<port name="mem_dq" internal="mem_dq" />
<port name="mem_dbi_n" internal="mem_dbi_n" />
</interface>
- <interface
- name="oct_conduit_end"
- internal="emif_0.oct_conduit_end"
- type="conduit"
- dir="end">
+ <interface name="oct" internal="emif_0.oct" type="conduit" dir="end">
<port name="oct_rzqin" internal="oct_rzqin" />
</interface>
<interface
- name="pll_ref_clk_clock_sink"
- internal="emif_0.pll_ref_clk_clock_sink"
+ name="pll_ref_clk"
+ internal="emif_0.pll_ref_clk"
type="clock"
dir="end">
<port name="pll_ref_clk" internal="pll_ref_clk" />
</interface>
- <interface
- name="status_conduit_end"
- internal="emif_0.status_conduit_end"
- type="conduit"
- dir="end">
+ <interface name="status" internal="emif_0.status" type="conduit" dir="end">
<port name="local_cal_success" internal="local_cal_success" />
<port name="local_cal_fail" internal="local_cal_fail" />
</interface>
@@ -144,44 +133,44 @@
<parameter name="BOARD_DDR3_PKG+BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
<parameter name="BOARD_DDR3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
<parameter name="BOARD_DDR3_SKEW_BETWEEN_DQS_NS" value="0.02" />
- <parameter name="BOARD_DDR3_USER_AC_ISI_NS" value="0.094" />
+ <parameter name="BOARD_DDR3_USER_AC_ISI_NS" value="0.0" />
<parameter name="BOARD_DDR3_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="BOARD_DDR3_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR3_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="BOARD_DDR3_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR3_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_DDR3_USER_RCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR3_USER_RCLK_SLEW_RATE" value="5.0" />
+ <parameter name="BOARD_DDR3_USER_RDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_DDR3_USER_RDATA_SLEW_RATE" value="2.5" />
- <parameter name="BOARD_DDR3_USER_WCLK_ISI_NS" value="0.031" />
+ <parameter name="BOARD_DDR3_USER_WCLK_ISI_NS" value="0.0" />
<parameter name="BOARD_DDR3_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR3_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_DDR3_USER_WDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_DDR3_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="BOARD_DDR3_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter name="BOARD_DDR3_USE_DEFAULT_SLEW_RATES" value="true" />
- <parameter name="BOARD_DDR4_AC_TO_CK_SKEW_NS" value="0.0" />
- <parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="BOARD_DDR4_DQS_TO_CK_SKEW_NS" value="0.02" />
+ <parameter name="BOARD_DDR4_AC_TO_CK_SKEW_NS" value="0.013" />
+ <parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_AC_NS" value="0.146" />
+ <parameter name="BOARD_DDR4_BRD_SKEW_WITHIN_DQS_NS" value="0.03" />
+ <parameter name="BOARD_DDR4_DQS_TO_CK_SKEW_NS" value="-0.21" />
<parameter name="BOARD_DDR4_IS_SKEW_WITHIN_AC_DESKEWED" value="false" />
- <parameter name="BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED" value="true" />
- <parameter name="BOARD_DDR4_MAX_CK_DELAY_NS" value="0.6" />
- <parameter name="BOARD_DDR4_MAX_DQS_DELAY_NS" value="0.6" />
+ <parameter name="BOARD_DDR4_IS_SKEW_WITHIN_DQS_DESKEWED" value="false" />
+ <parameter name="BOARD_DDR4_MAX_CK_DELAY_NS" value="0.252" />
+ <parameter name="BOARD_DDR4_MAX_DQS_DELAY_NS" value="0.323" />
<parameter name="BOARD_DDR4_PKG+BRD_SKEW_WITHIN_AC_NS" value="0.02" />
- <parameter name="BOARD_DDR4_PKG+BRD_SKEW_WITHIN_DQS_NS" value="0.02" />
- <parameter name="BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
- <parameter name="BOARD_DDR4_SKEW_BETWEEN_DQS_NS" value="0.02" />
- <parameter name="BOARD_DDR4_USER_AC_ISI_NS" value="0.094" />
- <parameter name="BOARD_DDR4_USER_AC_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_DDR4_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR4_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="BOARD_DDR4_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR4_USER_RDATA_ISI_NS" value="0.063" />
- <parameter name="BOARD_DDR4_USER_RDATA_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR4_USER_WCLK_ISI_NS" value="0.031" />
- <parameter name="BOARD_DDR4_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_DDR4_USER_WDATA_ISI_NS" value="0.063" />
- <parameter name="BOARD_DDR4_USER_WDATA_SLEW_RATE" value="2.0" />
+ <parameter name="BOARD_DDR4_PKG+BRD_SKEW_WITHIN_DQS_NS" value="0.072" />
+ <parameter name="BOARD_DDR4_SKEW_BETWEEN_DIMMS_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_SKEW_BETWEEN_DQS_NS" value="0.133" />
+ <parameter name="BOARD_DDR4_USER_AC_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_AC_SLEW_RATE" value="1.16" />
+ <parameter name="BOARD_DDR4_USER_CK_SLEW_RATE" value="2.43" />
+ <parameter name="BOARD_DDR4_USER_RCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_RCLK_SLEW_RATE" value="3.7" />
+ <parameter name="BOARD_DDR4_USER_RDATA_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_RDATA_SLEW_RATE" value="2.2" />
+ <parameter name="BOARD_DDR4_USER_WCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_WCLK_SLEW_RATE" value="3.7" />
+ <parameter name="BOARD_DDR4_USER_WDATA_ISI_NS" value="0.0" />
+ <parameter name="BOARD_DDR4_USER_WDATA_SLEW_RATE" value="2.16" />
<parameter name="BOARD_DDR4_USE_DEFAULT_ISI_VALUES" value="true" />
- <parameter name="BOARD_DDR4_USE_DEFAULT_SLEW_RATES" value="true" />
+ <parameter name="BOARD_DDR4_USE_DEFAULT_SLEW_RATES" value="false" />
<parameter name="BOARD_QDR2_AC_TO_K_SKEW_NS" value="0.0" />
<parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_AC_NS" value="0.02" />
<parameter name="BOARD_QDR2_BRD_SKEW_WITHIN_D_NS" value="0.02" />
@@ -194,15 +183,15 @@
<parameter name="BOARD_QDR2_PKG+BRD_SKEW_WITHIN_D_NS" value="0.02" />
<parameter name="BOARD_QDR2_PKG+BRD_SKEW_WITHIN_Q_NS" value="0.02" />
<parameter name="BOARD_QDR2_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
- <parameter name="BOARD_QDR2_USER_AC_ISI_NS" value="0.094" />
+ <parameter name="BOARD_QDR2_USER_AC_ISI_NS" value="0.0" />
<parameter name="BOARD_QDR2_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="BOARD_QDR2_USER_K_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_QDR2_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="BOARD_QDR2_USER_RCLK_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_QDR2_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_QDR2_USER_RCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_QDR2_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="BOARD_QDR2_USER_RDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_QDR2_USER_RDATA_SLEW_RATE" value="2.0" />
- <parameter name="BOARD_QDR2_USER_WCLK_ISI_NS" value="0.031" />
- <parameter name="BOARD_QDR2_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_QDR2_USER_WCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_QDR2_USER_WDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_QDR2_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="BOARD_QDR2_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter name="BOARD_QDR2_USE_DEFAULT_SLEW_RATES" value="true" />
@@ -222,9 +211,9 @@
<parameter name="BOARD_QDR4_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="BOARD_QDR4_USER_CK_SLEW_RATE" value="4.0" />
<parameter name="BOARD_QDR4_USER_RCLK_ISI_NS" value="0.0" />
- <parameter name="BOARD_QDR4_USER_RCLK_SLEW_RATE" value="4.0" />
+ <parameter name="BOARD_QDR4_USER_RCLK_SLEW_RATE" value="5.0" />
<parameter name="BOARD_QDR4_USER_RDATA_ISI_NS" value="0.0" />
- <parameter name="BOARD_QDR4_USER_RDATA_SLEW_RATE" value="3.5" />
+ <parameter name="BOARD_QDR4_USER_RDATA_SLEW_RATE" value="2.5" />
<parameter name="BOARD_QDR4_USER_WCLK_ISI_NS" value="0.0" />
<parameter name="BOARD_QDR4_USER_WCLK_SLEW_RATE" value="4.0" />
<parameter name="BOARD_QDR4_USER_WDATA_ISI_NS" value="0.0" />
@@ -243,16 +232,16 @@
<parameter name="BOARD_RLD3_PKG+BRD_SKEW_WITHIN_QK_NS" value="0.02" />
<parameter name="BOARD_RLD3_SKEW_BETWEEN_DIMMS_NS" value="0.05" />
<parameter name="BOARD_RLD3_SKEW_BETWEEN_DK_NS" value="0.02" />
- <parameter name="BOARD_RLD3_USER_AC_ISI_NS" value="0.094" />
+ <parameter name="BOARD_RLD3_USER_AC_ISI_NS" value="0.0" />
<parameter name="BOARD_RLD3_USER_AC_SLEW_RATE" value="2.0" />
<parameter name="BOARD_RLD3_USER_CK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_RLD3_USER_RCLK_ISI_NS" value="0.094" />
- <parameter name="BOARD_RLD3_USER_RCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_RLD3_USER_RDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_RLD3_USER_RCLK_ISI_NS" value="0.0" />
+ <parameter name="BOARD_RLD3_USER_RCLK_SLEW_RATE" value="7.0" />
+ <parameter name="BOARD_RLD3_USER_RDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_RLD3_USER_RDATA_SLEW_RATE" value="3.5" />
- <parameter name="BOARD_RLD3_USER_WCLK_ISI_NS" value="0.031" />
+ <parameter name="BOARD_RLD3_USER_WCLK_ISI_NS" value="0.0" />
<parameter name="BOARD_RLD3_USER_WCLK_SLEW_RATE" value="4.0" />
- <parameter name="BOARD_RLD3_USER_WDATA_ISI_NS" value="0.063" />
+ <parameter name="BOARD_RLD3_USER_WDATA_ISI_NS" value="0.0" />
<parameter name="BOARD_RLD3_USER_WDATA_SLEW_RATE" value="2.0" />
<parameter name="BOARD_RLD3_USE_DEFAULT_ISI_VALUES" value="true" />
<parameter name="BOARD_RLD3_USE_DEFAULT_SLEW_RATES" value="true" />
@@ -309,7 +298,7 @@
<parameter name="DIAG_BOARD_DELAY_CONFIG_STR" value="" />
<parameter name="DIAG_DDR3_CA_LEVEL_EN" value="false" />
<parameter name="DIAG_DDR3_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_DDR3_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_DDR3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_DDR3_INTERFACE_ID" value="0" />
@@ -318,7 +307,7 @@
<parameter name="DIAG_DDR3_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="DIAG_DDR3_USE_TG_AVL_2" value="false" />
<parameter name="DIAG_DDR4_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_DDR4_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_DDR4_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_DDR4_INTERFACE_ID" value="0" />
@@ -339,7 +328,7 @@
<parameter name="DIAG_EX_DESIGN_ADD_TEST_EMIFS" value="" />
<parameter name="DIAG_FAST_SIM_OVERRIDE">FAST_SIM_OVERRIDE_DEFAULT</parameter>
<parameter name="DIAG_QDR2_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_QDR2_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_QDR2_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_QDR2_INTERFACE_ID" value="0" />
@@ -348,7 +337,7 @@
<parameter name="DIAG_QDR2_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="DIAG_QDR2_USE_TG_AVL_2" value="false" />
<parameter name="DIAG_QDR4_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_QDR4_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_QDR4_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_QDR4_INTERFACE_ID" value="0" />
@@ -357,7 +346,7 @@
<parameter name="DIAG_QDR4_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="DIAG_QDR4_USE_TG_AVL_2" value="false" />
<parameter name="DIAG_RLD2_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_RLD2_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_RLD2_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_RLD2_INTERFACE_ID" value="0" />
@@ -366,7 +355,7 @@
<parameter name="DIAG_RLD2_TG_DATA_PATTERN_LENGTH" value="8" />
<parameter name="DIAG_RLD2_USE_TG_AVL_2" value="false" />
<parameter name="DIAG_RLD3_EFFICIENCY_MONITOR">EFFMON_MODE_DISABLED</parameter>
- <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER" value="true" />
+ <parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_MASTER" value="false" />
<parameter name="DIAG_RLD3_EXPORT_SEQ_AVALON_SLAVE">CAL_DEBUG_EXPORT_MODE_DISABLED</parameter>
<parameter name="DIAG_RLD3_EX_DESIGN_NUM_OF_SLAVES" value="1" />
<parameter name="DIAG_RLD3_INTERFACE_ID" value="0" />
@@ -398,8 +387,8 @@
<parameter name="MEM_DDR3_DQ_WIDTH" value="72" />
<parameter name="MEM_DDR3_DRV_STR_ENUM" value="DDR3_DRV_STR_RZQ_7" />
<parameter name="MEM_DDR3_FORMAT_ENUM" value="MEM_FORMAT_UDIMM" />
- <parameter name="MEM_DDR3_LRDIMM_EXTENDED_CONFIG">0x000000000000000000</parameter>
- <parameter name="MEM_DDR3_MIRROR_ADDRESSING_EN" value="false" />
+ <parameter name="MEM_DDR3_LRDIMM_EXTENDED_CONFIG" value="000000000000000000" />
+ <parameter name="MEM_DDR3_MIRROR_ADDRESSING_EN" value="true" />
<parameter name="MEM_DDR3_NUM_OF_DIMMS" value="1" />
<parameter name="MEM_DDR3_PD_ENUM" value="DDR3_PD_OFF" />
<parameter name="MEM_DDR3_RANKS_PER_DIMM" value="1" />
@@ -408,10 +397,10 @@
<parameter name="MEM_DDR3_RTT_NOM_ENUM">DDR3_RTT_NOM_ODT_DISABLED</parameter>
<parameter name="MEM_DDR3_RTT_WR_ENUM" value="DDR3_RTT_WR_RZQ_4" />
<parameter name="MEM_DDR3_R_ODT0_1X1" value="off" />
- <parameter name="MEM_DDR3_R_ODT0_2X2" value="off,on" />
+ <parameter name="MEM_DDR3_R_ODT0_2X2" value="off,off" />
<parameter name="MEM_DDR3_R_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR3_R_ODT0_4X4" value="off,off,off,off" />
- <parameter name="MEM_DDR3_R_ODT1_2X2" value="on,off" />
+ <parameter name="MEM_DDR3_R_ODT1_2X2" value="off,off" />
<parameter name="MEM_DDR3_R_ODT1_4X2" value="on,on,off,off" />
<parameter name="MEM_DDR3_R_ODT1_4X4" value="off,off,on,on" />
<parameter name="MEM_DDR3_R_ODT2_4X4" value="off,off,off,off" />
@@ -455,10 +444,10 @@
<parameter name="MEM_DDR3_USE_DEFAULT_ODT" value="true" />
<parameter name="MEM_DDR3_WTCL" value="10" />
<parameter name="MEM_DDR3_W_ODT0_1X1" value="on" />
- <parameter name="MEM_DDR3_W_ODT0_2X2" value="on,on" />
+ <parameter name="MEM_DDR3_W_ODT0_2X2" value="on,off" />
<parameter name="MEM_DDR3_W_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR3_W_ODT0_4X4" value="on,on,off,off" />
- <parameter name="MEM_DDR3_W_ODT1_2X2" value="on,on" />
+ <parameter name="MEM_DDR3_W_ODT1_2X2" value="off,on" />
<parameter name="MEM_DDR3_W_ODT1_4X2" value="on,on,off,off" />
<parameter name="MEM_DDR3_W_ODT1_4X4" value="off,off,on,on" />
<parameter name="MEM_DDR3_W_ODT2_4X4" value="off,off,on,on" />
@@ -485,7 +474,7 @@
<parameter name="MEM_DDR4_CKE_PER_DIMM" value="1" />
<parameter name="MEM_DDR4_CK_WIDTH" value="1" />
<parameter name="MEM_DDR4_COL_ADDR_WIDTH" value="10" />
- <parameter name="MEM_DDR4_DEFAULT_VREFOUT" value="true" />
+ <parameter name="MEM_DDR4_DEFAULT_VREFOUT" value="false" />
<parameter name="MEM_DDR4_DISCRETE_CS_WIDTH" value="1" />
<parameter name="MEM_DDR4_DLL_EN" value="true" />
<parameter name="MEM_DDR4_DM_EN" value="true" />
@@ -495,28 +484,28 @@
<parameter name="MEM_DDR4_FINE_GRANULARITY_REFRESH">DDR4_FINE_REFRESH_FIXED_1X</parameter>
<parameter name="MEM_DDR4_FORMAT_ENUM" value="MEM_FORMAT_SODIMM" />
<parameter name="MEM_DDR4_GEARDOWN" value="DDR4_GEARDOWN_HR" />
- <parameter name="MEM_DDR4_INTERNAL_VREFDQ_MONITOR" value="false" />
- <parameter name="MEM_DDR4_LRDIMM_EXTENDED_CONFIG">0x000000000000000000</parameter>
+ <parameter name="MEM_DDR4_INTERNAL_VREFDQ_MONITOR" value="true" />
+ <parameter name="MEM_DDR4_LRDIMM_EXTENDED_CONFIG" value="0000000000000000" />
<parameter name="MEM_DDR4_MAX_POWERDOWN" value="false" />
- <parameter name="MEM_DDR4_MIRROR_ADDRESSING_EN" value="false" />
+ <parameter name="MEM_DDR4_MIRROR_ADDRESSING_EN" value="true" />
<parameter name="MEM_DDR4_MPR_READ_FORMAT">DDR4_MPR_READ_FORMAT_SERIAL</parameter>
<parameter name="MEM_DDR4_NUM_OF_DIMMS" value="1" />
<parameter name="MEM_DDR4_ODT_IN_POWERDOWN" value="true" />
<parameter name="MEM_DDR4_PER_DRAM_ADDR" value="false" />
<parameter name="MEM_DDR4_RANKS_PER_DIMM" value="1" />
- <parameter name="MEM_DDR4_RDIMM_CONFIG" value="0000000000000000" />
+ <parameter name="MEM_DDR4_RDIMM_CONFIG">00000000000000000000000000000000000000</parameter>
<parameter name="MEM_DDR4_READ_DBI" value="false" />
- <parameter name="MEM_DDR4_READ_PREAMBLE" value="1" />
+ <parameter name="MEM_DDR4_READ_PREAMBLE" value="2" />
<parameter name="MEM_DDR4_READ_PREAMBLE_TRAINING" value="false" />
<parameter name="MEM_DDR4_ROW_ADDR_WIDTH" value="15" />
<parameter name="MEM_DDR4_RTT_NOM_ENUM" value="DDR4_RTT_NOM_RZQ_4" />
<parameter name="MEM_DDR4_RTT_PARK">DDR4_RTT_PARK_ODT_DISABLED</parameter>
- <parameter name="MEM_DDR4_RTT_WR_ENUM" value="DDR4_RTT_WR_RZQ_1" />
- <parameter name="MEM_DDR4_R_ODT0_1X1" value="off" />
- <parameter name="MEM_DDR4_R_ODT0_2X2" value="off,on" />
+ <parameter name="MEM_DDR4_RTT_WR_ENUM">DDR4_RTT_WR_ODT_DISABLED</parameter>
+ <parameter name="MEM_DDR4_R_ODT0_1X1" value="on" />
+ <parameter name="MEM_DDR4_R_ODT0_2X2" value="off,off" />
<parameter name="MEM_DDR4_R_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR4_R_ODT0_4X4" value="off,off,off,off" />
- <parameter name="MEM_DDR4_R_ODT1_2X2" value="on,off" />
+ <parameter name="MEM_DDR4_R_ODT1_2X2" value="off,off" />
<parameter name="MEM_DDR4_R_ODT1_4X2" value="on,on,off,off" />
<parameter name="MEM_DDR4_R_ODT1_4X4" value="off,off,on,on" />
<parameter name="MEM_DDR4_R_ODT2_4X4" value="off,off,off,off" />
@@ -526,13 +515,13 @@
<parameter name="MEM_DDR4_R_ODTN_4X2">Rank 0,Rank 1,Rank 2,Rank 3</parameter>
<parameter name="MEM_DDR4_R_ODTN_4X4">Rank 0,Rank 1,Rank 2,Rank 3</parameter>
<parameter name="MEM_DDR4_SELF_RFSH_ABORT" value="false" />
- <parameter name="MEM_DDR4_SPEEDBIN_ENUM" value="DDR4_SPEEDBIN_2400" />
+ <parameter name="MEM_DDR4_SPEEDBIN_ENUM" value="DDR4_SPEEDBIN_2133" />
<parameter name="MEM_DDR4_TCCD_L_CYC" value="5" />
<parameter name="MEM_DDR4_TCCD_S_CYC" value="4" />
- <parameter name="MEM_DDR4_TCL" value="12" />
+ <parameter name="MEM_DDR4_TCL" value="11" />
<parameter name="MEM_DDR4_TDIVW_DJ_CYC" value="0.1" />
- <parameter name="MEM_DDR4_TDQSCK_PS" value="165" />
- <parameter name="MEM_DDR4_TDQSQ_PS" value="66" />
+ <parameter name="MEM_DDR4_TDQSCK_PS" value="170" />
+ <parameter name="MEM_DDR4_TDQSQ_PS" value="100" />
<parameter name="MEM_DDR4_TDQSS_CYC" value="0.27" />
<parameter name="MEM_DDR4_TDSH_CYC" value="0.18" />
<parameter name="MEM_DDR4_TDSS_CYC" value="0.18" />
@@ -541,38 +530,38 @@
<parameter name="MEM_DDR4_TEMP_SENSOR_READOUT" value="false" />
<parameter name="MEM_DDR4_TFAW_NS" value="21.0" />
<parameter name="MEM_DDR4_TIH_DC_MV" value="75" />
- <parameter name="MEM_DDR4_TIH_PS" value="95" />
+ <parameter name="MEM_DDR4_TIH_PS" value="105" />
<parameter name="MEM_DDR4_TINIT_US" value="500" />
<parameter name="MEM_DDR4_TIS_AC_MV" value="100" />
- <parameter name="MEM_DDR4_TIS_PS" value="60" />
+ <parameter name="MEM_DDR4_TIS_PS" value="80" />
<parameter name="MEM_DDR4_TMRD_CK_CYC" value="8" />
<parameter name="MEM_DDR4_TQH_CYC" value="0.38" />
<parameter name="MEM_DDR4_TQSH_CYC" value="0.38" />
- <parameter name="MEM_DDR4_TRAS_NS" value="32.0" />
- <parameter name="MEM_DDR4_TRCD_NS" value="15.0" />
+ <parameter name="MEM_DDR4_TRAS_NS" value="33.0" />
+ <parameter name="MEM_DDR4_TRCD_NS" value="14.06" />
<parameter name="MEM_DDR4_TREFI_US" value="7.8" />
<parameter name="MEM_DDR4_TRFC_NS" value="260.0" />
- <parameter name="MEM_DDR4_TRP_NS" value="15.0" />
- <parameter name="MEM_DDR4_TRRD_L_CYC" value="4" />
- <parameter name="MEM_DDR4_TRRD_S_CYC" value="4" />
- <parameter name="MEM_DDR4_TWLH_PS" value="108.0" />
- <parameter name="MEM_DDR4_TWLS_PS" value="108.0" />
+ <parameter name="MEM_DDR4_TRP_NS" value="14.06" />
+ <parameter name="MEM_DDR4_TRRD_L_CYC" value="5" />
+ <parameter name="MEM_DDR4_TRRD_S_CYC" value="3" />
+ <parameter name="MEM_DDR4_TWLH_PS" value="162.5" />
+ <parameter name="MEM_DDR4_TWLS_PS" value="162.5" />
<parameter name="MEM_DDR4_TWR_NS" value="15.0" />
- <parameter name="MEM_DDR4_TWTR_L_CYC" value="4" />
+ <parameter name="MEM_DDR4_TWTR_L_CYC" value="6" />
<parameter name="MEM_DDR4_TWTR_S_CYC" value="2" />
<parameter name="MEM_DDR4_USER_VREFDQ_TRAINING_RANGE">DDR4_VREFDQ_TRAINING_RANGE_1</parameter>
- <parameter name="MEM_DDR4_USER_VREFDQ_TRAINING_VALUE" value="60.0" />
- <parameter name="MEM_DDR4_USE_DEFAULT_ODT" value="true" />
+ <parameter name="MEM_DDR4_USER_VREFDQ_TRAINING_VALUE" value="68.0" />
+ <parameter name="MEM_DDR4_USE_DEFAULT_ODT" value="false" />
<parameter name="MEM_DDR4_VDIVW_TOTAL" value="136" />
<parameter name="MEM_DDR4_WRITE_CRC" value="false" />
<parameter name="MEM_DDR4_WRITE_DBI" value="false" />
<parameter name="MEM_DDR4_WRITE_PREAMBLE" value="1" />
- <parameter name="MEM_DDR4_WTCL" value="12" />
+ <parameter name="MEM_DDR4_WTCL" value="9" />
<parameter name="MEM_DDR4_W_ODT0_1X1" value="on" />
- <parameter name="MEM_DDR4_W_ODT0_2X2" value="on,on" />
+ <parameter name="MEM_DDR4_W_ODT0_2X2" value="on,off" />
<parameter name="MEM_DDR4_W_ODT0_4X2" value="off,off,on,on" />
<parameter name="MEM_DDR4_W_ODT0_4X4" value="on,on,off,off" />
- <parameter name="MEM_DDR4_W_ODT1_2X2" value="on,on" />
+ <parameter name="MEM_DDR4_W_ODT1_2X2" value="off,on" />
<parameter name="MEM_DDR4_W_ODT1_4X2" value="on,on,off,off" />
<parameter name="MEM_DDR4_W_ODT1_4X4" value="off,off,on,on" />
<parameter name="MEM_DDR4_W_ODT2_4X4" value="off,off,on,on" />
@@ -690,26 +679,26 @@
<parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="PHY_DDR4_CONFIG_ENUM">CONFIG_PHY_AND_HARD_CTRL</parameter>
<parameter name="PHY_DDR4_CORE_CLKS_SHARING_ENUM">CORE_CLKS_SHARING_DISABLED</parameter>
- <parameter name="PHY_DDR4_DEFAULT_IO" value="true" />
+ <parameter name="PHY_DDR4_DEFAULT_IO" value="false" />
<parameter name="PHY_DDR4_DEFAULT_REF_CLK_FREQ" value="false" />
<parameter name="PHY_DDR4_IO_VOLTAGE" value="1.2" />
<parameter name="PHY_DDR4_MEM_CLK_FREQ_MHZ" value="800.0" />
<parameter name="PHY_DDR4_RATE_ENUM" value="RATE_QUARTER" />
<parameter name="PHY_DDR4_REF_CLK_JITTER_PS" value="10.0" />
- <parameter name="PHY_DDR4_STARTING_VREFIN" value="70.0" />
- <parameter name="PHY_DDR4_USER_AC_IO_STD_ENUM" value="unset" />
- <parameter name="PHY_DDR4_USER_AC_MODE_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_STARTING_VREFIN" value="68.0" />
+ <parameter name="PHY_DDR4_USER_AC_IO_STD_ENUM" value="IO_STD_SSTL_12" />
+ <parameter name="PHY_DDR4_USER_AC_MODE_ENUM" value="OUT_OCT_40_CAL" />
<parameter name="PHY_DDR4_USER_AC_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PHY_DDR4_USER_CK_IO_STD_ENUM" value="unset" />
- <parameter name="PHY_DDR4_USER_CK_MODE_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_USER_CK_IO_STD_ENUM" value="IO_STD_SSTL_12" />
+ <parameter name="PHY_DDR4_USER_CK_MODE_ENUM" value="OUT_OCT_40_CAL" />
<parameter name="PHY_DDR4_USER_CK_SLEW_RATE_ENUM" value="SLEW_RATE_FAST" />
- <parameter name="PHY_DDR4_USER_DATA_IN_MODE_ENUM" value="unset" />
- <parameter name="PHY_DDR4_USER_DATA_IO_STD_ENUM" value="unset" />
- <parameter name="PHY_DDR4_USER_DATA_OUT_MODE_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_USER_DATA_IN_MODE_ENUM" value="IN_OCT_120_CAL" />
+ <parameter name="PHY_DDR4_USER_DATA_IO_STD_ENUM" value="IO_STD_POD_12" />
+ <parameter name="PHY_DDR4_USER_DATA_OUT_MODE_ENUM" value="OUT_OCT_34_CAL" />
<parameter name="PHY_DDR4_USER_PING_PONG_EN" value="false" />
- <parameter name="PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_USER_PLL_REF_CLK_IO_STD_ENUM" value="IO_STD_CMOS_12" />
<parameter name="PHY_DDR4_USER_REF_CLK_FREQ_MHZ" value="25.0" />
- <parameter name="PHY_DDR4_USER_RZQ_IO_STD_ENUM" value="unset" />
+ <parameter name="PHY_DDR4_USER_RZQ_IO_STD_ENUM" value="IO_STD_CMOS_12" />
<parameter name="PHY_QDR2_CONFIG_ENUM">CONFIG_PHY_AND_SOFT_CTRL</parameter>
<parameter name="PHY_QDR2_CORE_CLKS_SHARING_ENUM">CORE_CLKS_SHARING_DISABLED</parameter>
<parameter name="PHY_QDR2_DEFAULT_IO" value="true" />
@@ -835,13 +824,14 @@
<parameter name="PLL_EXTRA_CLK_PHASE_SHIFT_UNIT_GUI_8" value="0" />
<parameter name="PLL_USER_NUM_OF_EXTRA_CLKS" value="0" />
<parameter name="PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
- <parameter name="SHORT_QSYS_INTERFACE_NAMES" value="false" />
+ <parameter name="SHORT_QSYS_INTERFACE_NAMES" value="true" />
<parameter name="SYS_INFO_DEVICE" value="10AX115U4F45I3SGES" />
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Arria 10" />
<parameter name="SYS_INFO_DEVICE_SPEEDGRADE" value="3" />
<parameter name="SYS_INFO_UNIQUE_ID" value="$${FILENAME}_emif_0" />
</module>
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
+ <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>