From 045c82907853bd0c21fb7d049f5ca138cad20bcf Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Mon, 8 Jan 2018 15:42:15 +0000 Subject: [PATCH] Declared mm_file component in mm_file_pkg.vhd to avoid having to do it in each tb or mmm file. --- .../unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd | 17 ----------------- .../src/vhdl/mmm_unb2a_minimal.vhd | 17 ----------------- .../unb2a_test/src/vhdl/mmm_unb2a_test.vhd | 17 ----------------- 3 files changed, 51 deletions(-) diff --git a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd index 3bc753eb49..ccd5f167bb 100644 --- a/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd +++ b/boards/uniboard2a/designs/unb2a_heater/src/vhdl/mmm_unb2a_heater.vhd @@ -112,23 +112,6 @@ ARCHITECTURE str OF mmm_unb2a_heater IS SIGNAL i_reset_n : STD_LOGIC; - ---------------------------------------------------------------------------- - -- mm_file component - ---------------------------------------------------------------------------- - COMPONENT mm_file - GENERIC( - g_file_prefix : STRING; - g_update_on_change : BOOLEAN := FALSE; - g_mm_rd_latency : NATURAL := 1 - ); - PORT ( - mm_rst : IN STD_LOGIC; - mm_clk : IN STD_LOGIC; - mm_master_out : OUT t_mem_mosi; - mm_master_in : IN t_mem_miso - ); - END COMPONENT; - BEGIN ---------------------------------------------------------------------------- diff --git a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd index 5c2f947727..f2e4fd38dd 100644 --- a/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd +++ b/boards/uniboard2a/designs/unb2a_minimal/src/vhdl/mmm_unb2a_minimal.vhd @@ -108,23 +108,6 @@ ARCHITECTURE str OF mmm_unb2a_minimal IS SIGNAL i_reset_n : STD_LOGIC; - ---------------------------------------------------------------------------- - -- mm_file component - ---------------------------------------------------------------------------- - COMPONENT mm_file - GENERIC( - g_file_prefix : STRING; - g_update_on_change : BOOLEAN := FALSE; - g_mm_rd_latency : NATURAL := 1 - ); - PORT ( - mm_rst : IN STD_LOGIC; - mm_clk : IN STD_LOGIC; - mm_master_out : OUT t_mem_mosi; - mm_master_in : IN t_mem_miso - ); - END COMPONENT; - BEGIN ---------------------------------------------------------------------------- diff --git a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd index d6a07a7f6f..d558269b2d 100644 --- a/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd +++ b/boards/uniboard2a/designs/unb2a_test/src/vhdl/mmm_unb2a_test.vhd @@ -284,23 +284,6 @@ ARCHITECTURE str OF mmm_unb2a_test IS SIGNAL sim_eth1g_eth1_reg_mosi : t_mem_mosi; SIGNAL i_reset_n : STD_LOGIC; - ---------------------------------------------------------------------------- - -- mm_file component - ---------------------------------------------------------------------------- - COMPONENT mm_file - GENERIC( - g_file_prefix : STRING; - g_update_on_change : BOOLEAN := FALSE; - g_mm_rd_latency : NATURAL := 1 - ); - PORT ( - mm_rst : IN STD_LOGIC; - mm_clk : IN STD_LOGIC; - mm_master_out : OUT t_mem_mosi; - mm_master_in : IN t_mem_miso - ); - END COMPONENT; - BEGIN ---------------------------------------------------------------------------- -- GitLab