diff --git a/libraries/base/dp/src/vhdl/dp_field_blk.vhd b/libraries/base/dp/src/vhdl/dp_field_blk.vhd
index 02fa1b685719ffeeaf94c87bfa957b5d7e3a8cc1..477e36e314b1cf985d314f5d26f07ef7b4e1ec56 100644
--- a/libraries/base/dp/src/vhdl/dp_field_blk.vhd
+++ b/libraries/base/dp/src/vhdl/dp_field_blk.vhd
@@ -130,7 +130,7 @@ ARCHITECTURE str OF dp_field_blk IS
   CONSTANT c_mm_fields_slv_out_w : NATURAL := sel_a_b(c_field_to_block, g_snk_data_w, 0);
 
   SIGNAL mm_fields_slv_in     : STD_LOGIC_VECTOR(c_mm_fields_slv_in_w-1 DOWNTO 0);
-  SIGNAL mm_fields_slv_in_val : STD_LOGIC;
+  SIGNAL mm_fields_slv_in_val : STD_LOGIC := '0';  -- default '0' when c_field_to_block = TRUE
   SIGNAL mm_fields_slv_out    : STD_LOGIC_VECTOR(c_mm_fields_slv_out_w-1 DOWNTO 0);
 
   SIGNAL field_override_arr : STD_LOGIC_VECTOR(g_field_arr'RANGE) := g_field_sel; --1 override bit per field
@@ -176,7 +176,6 @@ BEGIN
     -- MM readout of fields
     mm_fields_slv_in     <= dp_repack_data_src_out.data(g_src_data_w-1 DOWNTO 0);
     mm_fields_slv_in_val <= dp_repack_data_src_out.valid;
-
   END GENERATE;
 
   ---------------------------------------------------------------------------------------