diff --git a/libraries/base/dp/tb/vhdl/tb_dp_bsn_align_v2.vhd b/libraries/base/dp/tb/vhdl/tb_dp_bsn_align_v2.vhd
index 283ce58b977b232b389d13637a4c934bc03c9404..c6f982c849733468d9a8a8b873c7af1f4a9a63cc 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_bsn_align_v2.vhd
@@ -96,6 +96,7 @@ ENTITY tb_dp_bsn_align_v2 IS
     g_disable_stream_id      : NATURAL := 0;      -- default 0 to enable all streams, > 0 selects stream that will be disabled
     g_lost_stream_id         : NATURAL := 0;      -- default 0 to have all streams, > 0 selects stream that will be lost
     g_lost_bsn_id            : NATURAL := 0;      -- for stream 1 the block with bsn = g_lost_bsn_id will be lost
+    g_bsn_init               : NATURAL := 3;      -- use > 0 to have no lost data for g_lost_bsn_id = 0
     g_use_mm_output          : BOOLEAN := FALSE;  -- output via MM or via streaming DP
     g_pipeline_input         : NATURAL := 0;      -- >= 0, choose 0 for wires, choose 1 to ease timing closure of in_sosi_arr
     g_pipeline_output        : NATURAL := 0;      -- >= 0, choose 0 for wires, choose 1 to ease timing closure of out_sop_arr
@@ -117,7 +118,6 @@ ARCHITECTURE tb OF tb_dp_bsn_align_v2 IS
   CONSTANT c_data_w                   : NATURAL := 16;
   CONSTANT c_data_init                : INTEGER := 0;
   CONSTANT c_bsn_w                    : NATURAL := 16;  -- use <= 31 bit to fit NATURAL
-  CONSTANT c_bsn_init                 : NATURAL := 3;   -- use > 0 to have no lost data for g_lost_bsn_id = 0
   CONSTANT c_channel_init             : INTEGER := 0;
   CONSTANT c_err_init                 : NATURAL := 247;
   CONSTANT c_sync_period              : NATURAL := 7;
@@ -290,7 +290,7 @@ BEGIN
 
       -- Begin of stimuli
       FOR S IN 0 TO g_tb_nof_restart-1 LOOP
-        v_bsn := c_bsn_init;
+        v_bsn := g_bsn_init;
         FOR R IN 0 TO g_tb_nof_blocks-1 LOOP
           v_sync := sel_a_b(v_bsn MOD c_sync_period = c_sync_offset, '1', '0');
           proc_dp_gen_block_data(c_rl, TRUE, c_data_w, c_data_w, v_data, 0, 0, g_block_size, v_channel, v_err, v_sync, TO_UVEC(v_bsn, c_bsn_w), clk, sl1, ref_siso_arr(I), ref_sosi_arr(I));
@@ -433,7 +433,7 @@ BEGIN
   BEGIN
     IF c_diff_delay <= c_align_latency_nof_clk THEN
       verify_sosi_en_arr <= (OTHERS => '1');
-      IF TO_UINT(out_sosi_exp.bsn) - c_bsn_init >= c_verify_nof_blocks THEN
+      IF TO_UINT(out_sosi_exp.bsn) - g_bsn_init >= c_verify_nof_blocks THEN
         verify_sosi_en_arr <= (OTHERS => '0');
       END IF;
     END IF;
diff --git a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_align_v2.vhd b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_align_v2.vhd
index fce4f84c0dcbae62bc86693567443469f4657586..ef221c4db9fd01e6622269fab904880517c55c75 100644
--- a/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_tb_dp_bsn_align_v2.vhd
@@ -54,6 +54,7 @@ BEGIN
   -- g_disable_stream_id          : NATURAL := 0;      -- default 0 to enable all streams, > 0 selects stream that will be disabled
   -- g_lost_stream_id             : NATURAL := 0;      -- default 0 to have all streams, > 0 selects stream that will be lost
   -- g_lost_bsn_id                : NATURAL := 10;     -- for stream 1 the block with bsn = g_lost_bsn_id will be lost
+  -- g_bsn_init                   : NATURAL := 3;      -- use > 0 to have no lost data for g_lost_bsn_id = 0
   -- g_use_mm_output              : BOOLEAN := FALSE;  -- output via MM or via streaming DP
   -- g_pipeline_input             : NATURAL := 0;      -- >= 0, choose 0 for wires, choose 1 to ease timing closure of in_sosi_arr
   -- g_pipeline_output            : NATURAL := 0;      -- >= 0, choose 0 for wires, choose 1 to ease timing closure of out_sop_arr
@@ -65,22 +66,24 @@ BEGIN
   -- g_tb_nof_restart       : NATURAL := 1;       -- number of times to restart the input stimuli
   -- g_tb_nof_blocks        : NATURAL := 10       -- number of input blocks per restart
 
-  u_mm_output               : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0,  TRUE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_mm_output_single        : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (1, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0,  TRUE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_dp_output               : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_dp_output_single        : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (1, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_dp_output_p1            : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 1, 1, 1,  0, 2, c_nof_blk);
-  u_bsn_lat_max_2           : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 2, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_bsn_lat_max_3           : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 3, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_p1_rd2                  : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 1, 0, 2,  0, 2, c_nof_blk);
-  u_zero_gap                : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block,  c_block, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_zero_gap_p1_rd2         : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block,  c_block, 32, 16, 17, 0, 0,  0, FALSE, 1, 1, 2,  0, 2, c_nof_blk);
-  u_stream_disable          : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 2, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_stream_lost             : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 2,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_stream_disable_lost     : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (4, 1, 1, c_block, c_period, 32, 16, 17, 1, 2,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_bsn_lost                : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 0, 10, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_diff_delay              : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1, -1, 2, c_nof_blk);
-  u_nof_aligners            : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 8, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1,  0, 2, c_nof_blk);
-  u_nof_aligners_diff_delay : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (4, 1, 3, c_block, c_period, 32, 16, 17, 0, 0,  0, FALSE, 0, 0, 1, -1, 2, c_nof_blk);
+  u_mm_output               : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    TRUE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_mm_output_large_bsn     : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3000, TRUE, 0, 0, 1,  0, 2, c_nof_blk);  -- test where bsn * g_block_size > 2^10 to test address resizing
+  u_mm_output_single        : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (1, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    TRUE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_dp_output               : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_dp_output_large_bsn     : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3000, FALSE, 0, 0, 1,  0, 2, c_nof_blk); -- test where bsn * g_block_size > 2^10 to test address resizing
+  u_dp_output_single        : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (1, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_dp_output_p1            : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 1, 1, 1,  0, 2, c_nof_blk);
+  u_bsn_lat_max_2           : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 2, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_bsn_lat_max_3           : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 3, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_p1_rd2                  : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 1, 0, 2,  0, 2, c_nof_blk);
+  u_zero_gap                : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block,  c_block, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_zero_gap_p1_rd2         : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 1, c_block,  c_block, 32, 16, 17, 0, 0,  0, 3,    FALSE, 1, 1, 2,  0, 2, c_nof_blk);
+  u_stream_disable          : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 2, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_stream_lost             : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 2,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_stream_disable_lost     : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (4, 1, 1, c_block, c_period, 32, 16, 17, 1, 2,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_bsn_lost                : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 0, 10, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_diff_delay              : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (3, 1, 1, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1, -1, 2, c_nof_blk);
+  u_nof_aligners            : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (2, 1, 8, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1,  0, 2, c_nof_blk);
+  u_nof_aligners_diff_delay : ENTITY work.tb_dp_bsn_align_v2 GENERIC MAP (4, 1, 3, c_block, c_period, 32, 16, 17, 0, 0,  0, 3,    FALSE, 0, 0, 1, -1, 2, c_nof_blk);
 
 END tb;