diff --git a/CDB/Darkrai_ConfigDb.json b/CDB/Darkrai_ConfigDb.json
index e4327e5e47d66ab5f5cc72a5b74d9a0d440c978d..401351c0ddf971c0d383d39fd7b0c327975e632f 100644
--- a/CDB/Darkrai_ConfigDb.json
+++ b/CDB/Darkrai_ConfigDb.json
@@ -109,22 +109,22 @@
"5.0"
],
"FPGA_sst_offload_hdr_eth_destination_mac_RW_default": [
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd"
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1"
],
"FPGA_sst_offload_hdr_ip_destination_address_RW_default": [
"10.99.250.250",
@@ -164,22 +164,22 @@
"5.0"
],
"FPGA_xst_offload_hdr_eth_destination_mac_RW_default": [
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd",
- "6c:2b:59:97:be:dd"
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1",
+ "0c:c4:7a:c0:30:f1"
],
"FPGA_xst_offload_hdr_ip_destination_address_RW_default": [
"10.99.250.250",