diff --git a/CDB/LOFAR_ConfigDb.json b/CDB/LOFAR_ConfigDb.json
index 98c3a994428d5a23a93ae842f3cdadf609cb7eca..57b53e5eb897d740c5ee9929fc72d699de5222b9 100644
--- a/CDB/LOFAR_ConfigDb.json
+++ b/CDB/LOFAR_ConfigDb.json
@@ -758,22 +758,22 @@
                                 "5.0"
                             ],
                             "FPGA_sst_offload_hdr_eth_destination_mac_RW_default": [
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de",
-                                "6c:2b:59:97:cb:de"
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd",
+                                "6c:2b:59:97:be:dd"
                             ],
                             "FPGA_sst_offload_hdr_ip_destination_address_RW_default": [
                                 "10.99.250.250",