diff --git a/devices/devices/apsct.py b/devices/devices/apsct.py
index 81bf3d482bf03fa721db32a1388f7a1230d83aa1..6b65c1a66f006c8ccc6f1c36b384b898b1acb91f 100644
--- a/devices/devices/apsct.py
+++ b/devices/devices/apsct.py
@@ -43,6 +43,30 @@ class APSCT(opcua_device):
# Attributes
# ----------
+ APSCTTR_translator_busy_R = attribute_wrapper(comms_annotation=["APSCTTR_translator_busy_R" ],datatype=numpy.bool_ )
+ APSCT_I2C_error_R = attribute_wrapper(comms_annotation=["APSCT_I2C_error_R" ],datatype=numpy.int64 )
+ APSCT_ID_R = attribute_wrapper(comms_annotation=["APSCT_ID_R" ],datatype=numpy.int64 )
+ APSCT_INPUT_10MHz_good_R = attribute_wrapper(comms_annotation=["APSCT_INPUT_10MHz_good_R" ],datatype=numpy.bool_ )
+ APSCT_INPUT_PPS_good_R = attribute_wrapper(comms_annotation=["APSCT_INPUT_PPS_good_R" ],datatype=numpy.bool_ )
+ APSCT_PLL_160MHz_error_R = attribute_wrapper(comms_annotation=["APSCT_PLL_160MHz_error_R" ],datatype=numpy.bool_ )
+ APSCT_PLL_160MHz_locked_R = attribute_wrapper(comms_annotation=["APSCT_PLL_160MHz_locked_R" ],datatype=numpy.bool_ )
+ APSCT_PLL_200MHz_error_R = attribute_wrapper(comms_annotation=["APSCT_PLL_200MHz_error_R" ],datatype=numpy.bool_ )
+ APSCT_PLL_200MHz_locked_R = attribute_wrapper(comms_annotation=["APSCT_PLL_200MHz_locked_R" ],datatype=numpy.bool_ )
+ APSCT_PPS_ignore_R = attribute_wrapper(comms_annotation=["APSCT_PPS_ignore_R" ],datatype=numpy.bool_ )
+ APSCT_PPS_ignore_RW = attribute_wrapper(comms_annotation=["APSCT_PPS_ignore_RW" ],datatype=numpy.bool_ , access=AttrWriteType.READ_WRITE)
+ APSCT_PWR_CLKDIST1_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_CLKDIST1_3V3_R" ],datatype=numpy.float64)
+ APSCT_PWR_CLKDIST2_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_CLKDIST2_3V3_R" ],datatype=numpy.float64)
+ APSCT_PWR_CTRL_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_CTRL_3V3_R" ],datatype=numpy.float64)
+ APSCT_PWR_INPUT_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_INPUT_3V3_R" ],datatype=numpy.float64)
+ APSCT_PWR_on_R = attribute_wrapper(comms_annotation=["APSCT_PWR_on_R" ],datatype=numpy.bool_ )
+ APSCT_PWR_PLL_160MHz_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_PLL_160MHz_3V3_R"],datatype=numpy.float64)
+ APSCT_PWR_PLL_160MHz_on_R = attribute_wrapper(comms_annotation=["APSCT_PWR_PLL_160MHz_on_R" ],datatype=numpy.bool_ )
+ APSCT_PWR_PLL_200MHz_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_PLL_200MHz_3V3_R"],datatype=numpy.float64)
+ APSCT_PWR_PLL_200MHz_on_R = attribute_wrapper(comms_annotation=["APSCT_PWR_PLL_200MHz_on_R" ],datatype=numpy.bool_ )
+ APSCT_PWR_PPSDIST_3V3_R = attribute_wrapper(comms_annotation=["APSCT_PWR_PPSDIST_3V3_R" ],datatype=numpy.float64)
+ APSCT_temperature_R = attribute_wrapper(comms_annotation=["APSCT_temperature_R" ],datatype=numpy.float64)
+ APSCT_version_R = attribute_wrapper(comms_annotation=["APSCT_version_R" ],datatype=str )
+
# --------
# overloaded functions
# --------
@@ -52,8 +76,6 @@ class APSCT(opcua_device):
# Commands
# --------
- pass
-
# ----------
# Run server
# ----------
diff --git a/devices/devices/apspu.py b/devices/devices/apspu.py
index 2e9251505bd5ce8e05c8aa66987a59fd04f18c72..4c3d04b201dcfd85f9232e38e26f529a8c9ec0f2 100644
--- a/devices/devices/apspu.py
+++ b/devices/devices/apspu.py
@@ -43,6 +43,23 @@ class APSPU(opcua_device):
# Attributes
# ----------
+ APSPUTR_translator_busy_R = attribute_wrapper(comms_annotation=["APSPUTR_translator_busy_R" ],datatype=numpy.bool_ )
+ APSPU_FAN1_RMS_R = attribute_wrapper(comms_annotation=["APSPU_FAN1_RMS_R" ],datatype=numpy.float64)
+ APSPU_FAN2_RMS_R = attribute_wrapper(comms_annotation=["APSPU_FAN2_RMS_R" ],datatype=numpy.float64)
+ APSPU_FAN3_RMS_R = attribute_wrapper(comms_annotation=["APSPU_FAN3_RMS_R" ],datatype=numpy.float64)
+ APSPU_I2C_error_R = attribute_wrapper(comms_annotation=["APSPU_I2C_error_R" ],datatype=numpy.int64 )
+ APSPU_ID_R = attribute_wrapper(comms_annotation=["APSPU_ID_R" ],datatype=numpy.int64 )
+ APSPU_LBA_IOUT_R = attribute_wrapper(comms_annotation=["APSPU_LBA_IOUT_R" ],datatype=numpy.float64)
+ APSPU_LBA_TEMP_R = attribute_wrapper(comms_annotation=["APSPU_LBA_TEMP_R" ],datatype=numpy.float64)
+ APSPU_LBA_VOUT_R = attribute_wrapper(comms_annotation=["APSPU_LBA_VOUT_R" ],datatype=numpy.float64)
+ APSPU_RCU2A_IOUT_R = attribute_wrapper(comms_annotation=["APSPU_RCU2A_IOUT_R" ],datatype=numpy.float64)
+ APSPU_RCU2A_TEMP_R = attribute_wrapper(comms_annotation=["APSPU_RCU2A_TEMP_R" ],datatype=numpy.float64)
+ APSPU_RCU2A_VOUT_R = attribute_wrapper(comms_annotation=["APSPU_RCU2A_VOUT_R" ],datatype=numpy.float64)
+ APSPU_RCU2D_IOUT_R = attribute_wrapper(comms_annotation=["APSPU_RCU2D_IOUT_R" ],datatype=numpy.float64)
+ APSPU_RCU2D_TEMP_R = attribute_wrapper(comms_annotation=["APSPU_RCU2D_TEMP_R" ],datatype=numpy.float64)
+ APSPU_RCU2D_VOUT_R = attribute_wrapper(comms_annotation=["APSPU_RCU2D_VOUT_R" ],datatype=numpy.float64)
+ APSPU_version_R = attribute_wrapper(comms_annotation=["APSPU_version_R" ],datatype=str )
+
# --------
# overloaded functions
# --------
@@ -52,8 +69,6 @@ class APSPU(opcua_device):
# Commands
# --------
- pass
-
# ----------
# Run server
# ----------
diff --git a/devices/devices/recv.py b/devices/devices/recv.py
index ec156f124c13ff8ee7be3b16c99413eeac10e79c..4d86bda4bbd75ec89a775fd6e3f9820795017a9b 100644
--- a/devices/devices/recv.py
+++ b/devices/devices/recv.py
@@ -39,7 +39,7 @@ class RECV(opcua_device):
# Device Properties
# -----------------
- Ant_mask_RW_default = device_property(
+ ANT_mask_RW_default = device_property(
dtype='DevVarBooleanArray',
mandatory=False,
default_value=[[True] * 3] * 32
@@ -53,47 +53,54 @@ class RECV(opcua_device):
first_default_settings = [
# set the masks first, as those filter any subsequent settings
- 'Ant_mask_RW',
+ 'ANT_mask_RW',
'RCU_mask_RW'
]
# ----------
# Attributes
# ----------
- Ant_mask_RW = attribute_wrapper(comms_annotation=["2:Ant_mask_RW"], datatype=numpy.bool_, dims=(3, 32), access=AttrWriteType.READ_WRITE)
Ant_status_R = attribute(dtype=str, max_dim_x=3, max_dim_y=32)
- CLK_Enable_PWR_R = attribute_wrapper(comms_annotation=["2:CLK_Enable_PWR_R"], datatype=numpy.bool_)
- CLK_I2C_STATUS_R = attribute_wrapper(comms_annotation=["2:CLK_I2C_STATUS_R"], datatype=numpy.int64)
- CLK_PLL_error_R = attribute_wrapper(comms_annotation=["2:CLK_PLL_error_R"], datatype=numpy.bool_)
- CLK_PLL_locked_R = attribute_wrapper(comms_annotation=["2:CLK_PLL_locked_R"], datatype=numpy.bool_)
- CLK_monitor_rate_RW = attribute_wrapper(comms_annotation=["2:CLK_monitor_rate_RW"], datatype=numpy.int64, access=AttrWriteType.READ_WRITE)
- CLK_translator_busy_R = attribute_wrapper(comms_annotation=["2:CLK_translator_busy_R"], datatype=numpy.bool_)
- HBA_element_beamformer_delays_R = attribute_wrapper(comms_annotation=["2:HBA_element_beamformer_delays_R"], datatype=numpy.int64, dims=(32, 96))
- HBA_element_beamformer_delays_RW = attribute_wrapper(comms_annotation=["2:HBA_element_beamformer_delays_RW"], datatype=numpy.int64, dims=(32, 96), access=AttrWriteType.READ_WRITE)
- HBA_element_led_R = attribute_wrapper(comms_annotation=["2:HBA_element_led_R"], datatype=numpy.int64, dims=(32, 96))
- HBA_element_led_RW = attribute_wrapper(comms_annotation=["2:HBA_element_led_RW"], datatype=numpy.int64, dims=(32, 96), access=AttrWriteType.READ_WRITE)
- HBA_element_LNA_pwr_R = attribute_wrapper(comms_annotation=["2:HBA_element_LNA_pwr_R"], datatype=numpy.int64, dims=(32, 96))
- HBA_element_LNA_pwr_RW = attribute_wrapper(comms_annotation=["2:HBA_element_LNA_pwr_RW"], datatype=numpy.int64, dims=(32, 96), access=AttrWriteType.READ_WRITE)
- HBA_element_pwr_R = attribute_wrapper(comms_annotation=["2:HBA_element_pwr_R"], datatype=numpy.int64, dims=(32, 96))
- HBA_element_pwr_RW = attribute_wrapper(comms_annotation=["2:HBA_element_pwr_RW"], datatype=numpy.int64, dims=(32, 96), access=AttrWriteType.READ_WRITE)
- RCU_ADC_lock_R = attribute_wrapper(comms_annotation=["2:RCU_ADC_lock_R"], datatype=numpy.int64, dims=(3, 32))
- RCU_attenuator_R = attribute_wrapper(comms_annotation=["2:RCU_attenuator_R"], datatype=numpy.int64, dims=(3, 32))
- RCU_attenuator_RW = attribute_wrapper(comms_annotation=["2:RCU_attenuator_RW"], datatype=numpy.int64, dims=(3, 32), access=AttrWriteType.READ_WRITE)
- RCU_band_R = attribute_wrapper(comms_annotation=["2:RCU_band_R"], datatype=numpy.int64, dims=(3, 32))
- RCU_band_RW = attribute_wrapper(comms_annotation=["2:RCU_band_RW"], datatype=numpy.int64, dims=(3, 32), access=AttrWriteType.READ_WRITE)
- RCU_I2C_STATUS_R = attribute_wrapper(comms_annotation=["2:RCU_I2C_STATUS_R"], datatype=numpy.int64, dims=(32,))
- RCU_ID_R = attribute_wrapper(comms_annotation=["2:RCU_ID_R"], datatype=numpy.int64, dims=(32,))
- RCU_LED0_R = attribute_wrapper(comms_annotation=["2:RCU_LED0_R"], datatype=numpy.bool_, dims=(32,))
- RCU_LED0_RW = attribute_wrapper(comms_annotation=["2:RCU_LED0_RW"], datatype=numpy.bool_, dims=(32,), access=AttrWriteType.READ_WRITE)
- RCU_LED1_R = attribute_wrapper(comms_annotation=["2:RCU_LED1_R"], datatype=numpy.bool_, dims=(32,))
- RCU_LED1_RW = attribute_wrapper(comms_annotation=["2:RCU_LED1_RW"], datatype=numpy.bool_, dims=(32,), access=AttrWriteType.READ_WRITE)
- RCU_mask_RW = attribute_wrapper(comms_annotation=["2:RCU_mask_RW"], datatype=numpy.bool_, dims=(32,), access=AttrWriteType.READ_WRITE)
- RCU_monitor_rate_RW = attribute_wrapper(comms_annotation=["2:RCU_monitor_rate_RW"], datatype=numpy.int64, access=AttrWriteType.READ_WRITE)
- RCU_Pwr_dig_R = attribute_wrapper(comms_annotation=["2:RCU_Pwr_dig_R"], datatype=numpy.bool_, dims=(32,))
- Ant_status_R = attribute(dtype=str, max_dim_x=32)
- RCU_temperature_R = attribute_wrapper(comms_annotation=["2:RCU_temperature_R"], datatype=numpy.float64, dims=(32,))
- RCU_translator_busy_R = attribute_wrapper(comms_annotation=["2:RCU_translator_busy_R"], datatype=numpy.bool_)
- RCU_version_R = attribute_wrapper(comms_annotation=["2:RCU_version_R"], datatype=numpy.str, dims=(32,))
+
+ ANT_mask_RW = attribute_wrapper(comms_annotation=["ANT_mask_RW" ],datatype=numpy.bool_ , dims=(3,32), access=AttrWriteType.READ_WRITE)
+ HBAT_beamformer_delays_R = attribute_wrapper(comms_annotation=["HBAT_beamformer_delays_R" ],datatype=numpy.int64 , dims=(32,96))
+ HBAT_beamformer_delays_RW = attribute_wrapper(comms_annotation=["HBAT_beamformer_delays_RW" ],datatype=numpy.int64 , dims=(32,96), access=AttrWriteType.READ_WRITE)
+ HBAT_LED_on_R = attribute_wrapper(comms_annotation=["HBAT_LED_on_R" ],datatype=numpy.bool_ , dims=(32,96))
+ HBAT_LED_on_RW = attribute_wrapper(comms_annotation=["HBAT_LED_on_RW" ],datatype=numpy.bool_ , dims=(32,96), access=AttrWriteType.READ_WRITE)
+ HBAT_PWR_LNA_on_R = attribute_wrapper(comms_annotation=["HBAT_PWR_LNA_on_R" ],datatype=numpy.bool_ , dims=(32,96))
+ HBAT_PWR_LNA_on_RW = attribute_wrapper(comms_annotation=["HBAT_PWR_LNA_on_RW" ],datatype=numpy.bool_ , dims=(32,96), access=AttrWriteType.READ_WRITE)
+ HBAT_PWR_on_R = attribute_wrapper(comms_annotation=["HBAT_PWR_on_R" ],datatype=numpy.bool_ , dims=(32,96))
+ HBAT_PWR_on_RW = attribute_wrapper(comms_annotation=["HBAT_PWR_on_RW" ],datatype=numpy.bool_ , dims=(32,96), access=AttrWriteType.READ_WRITE)
+ RCU_ADC_locked_R = attribute_wrapper(comms_annotation=["RCU_ADC_locked_R" ],datatype=numpy.bool_ , dims=(3,32))
+ RCU_attenuator_dB_R = attribute_wrapper(comms_annotation=["RCU_attenuator_dB_R" ],datatype=numpy.int64 , dims=(3,32))
+ RCU_attenuator_dB_RW = attribute_wrapper(comms_annotation=["RCU_attenuator_dB_RW" ],datatype=numpy.int64 , dims=(3,32), access=AttrWriteType.READ_WRITE)
+ RCU_band_select_R = attribute_wrapper(comms_annotation=["RCU_band_select_R" ],datatype=numpy.int64 , dims=(3,32))
+ RCU_band_select_RW = attribute_wrapper(comms_annotation=["RCU_band_select_RW" ],datatype=numpy.int64 , dims=(3,32), access=AttrWriteType.READ_WRITE)
+ RCU_DTH_freq_R = attribute_wrapper(comms_annotation=["RCU_DTH_freq_R" ],datatype=numpy.int64 , dims=(3,32))
+ RCU_DTH_freq_RW = attribute_wrapper(comms_annotation=["RCU_DTH_freq_RW" ],datatype=numpy.int64 , dims=(3,32), access=AttrWriteType.READ_WRITE)
+ RCU_DTH_on_R = attribute_wrapper(comms_annotation=["RCU_DTH_on_R" ],datatype=numpy.bool_ , dims=(3,32))
+ RCU_DTH_shutdown_R = attribute_wrapper(comms_annotation=["RCU_DTH_shutdown_R" ],datatype=numpy.bool_ , dims=(3,32))
+ RCU_I2C_error_R = attribute_wrapper(comms_annotation=["RCU_I2C_error_R" ],datatype=numpy.int64 , dims=(32,))
+ RCU_ID_R = attribute_wrapper(comms_annotation=["RCU_ID_R" ],datatype=numpy.int64 , dims=(32,))
+ RCU_LED_green_off_R = attribute_wrapper(comms_annotation=["RCU_LED_green_off_R" ],datatype=numpy.bool_ , dims=(32,))
+ RCU_LED_green_off_RW = attribute_wrapper(comms_annotation=["RCU_LED_green_off_RW" ],datatype=numpy.bool_ , dims=(32,), access=AttrWriteType.READ_WRITE)
+ RCU_LED_red_off_R = attribute_wrapper(comms_annotation=["RCU_LED_red_off_R" ],datatype=numpy.bool_ , dims=(32,))
+ RCU_LED_red_off_RW = attribute_wrapper(comms_annotation=["RCU_LED_red_off_RW" ],datatype=numpy.bool_ , dims=(32,), access=AttrWriteType.READ_WRITE)
+ RCU_mask_RW = attribute_wrapper(comms_annotation=["RCU_mask_RW" ],datatype=numpy.bool_ , dims=(32,), access=AttrWriteType.READ_WRITE)
+ RCU_PWR_1V8_R = attribute_wrapper(comms_annotation=["RCU_PWR_1V8_R" ],datatype=numpy.float64, dims=(32,))
+ RCU_PWR_2V5_R = attribute_wrapper(comms_annotation=["RCU_PWR_2V5_R" ],datatype=numpy.float64, dims=(32,))
+ RCU_PWR_3V3_R = attribute_wrapper(comms_annotation=["RCU_PWR_3V3_R" ],datatype=numpy.float64, dims=(32,))
+ RCU_PWR_ANALOG_on_R = attribute_wrapper(comms_annotation=["RCU_PWR_ANALOG_on_R" ],datatype=numpy.bool_ , dims=(32,))
+ RCU_PWR_ANT_IOUT_R = attribute_wrapper(comms_annotation=["RCU_PWR_ANT_IOUT_R" ],datatype=numpy.float64, dims=(3,32))
+ RCU_PWR_ANT_on_R = attribute_wrapper(comms_annotation=["RCU_PWR_ANT_on_R" ],datatype=numpy.bool_ , dims=(3,32))
+ RCU_PWR_ANT_on_RW = attribute_wrapper(comms_annotation=["RCU_PWR_ANT_on_RW" ],datatype=numpy.bool_ , dims=(3,32), access=AttrWriteType.READ_WRITE)
+ RCU_PWR_ANT_VIN_R = attribute_wrapper(comms_annotation=["RCU_PWR_ANT_VIN_R" ],datatype=numpy.float64, dims=(3,32))
+ RCU_PWR_ANT_VOUT_R = attribute_wrapper(comms_annotation=["RCU_PWR_ANT_VOUT_R" ],datatype=numpy.float64, dims=(3,32))
+ RCU_PWR_DIGITAL_on_R = attribute_wrapper(comms_annotation=["RCU_PWR_DIGITAL_on_R" ],datatype=numpy.bool_ , dims=(32,))
+ RCU_PWR_good_R = attribute_wrapper(comms_annotation=["RCU_PWR_good_R" ],datatype=numpy.bool_ , dims=(32,))
+ RCU_temperature_R = attribute_wrapper(comms_annotation=["RCU_temperature_R" ],datatype=numpy.float64, dims=(32,))
+ RCU_version_R = attribute_wrapper(comms_annotation=["RCU_version_R" ],datatype=str , dims=(32,))
+ RECVTR_translator_busy_R = attribute_wrapper(comms_annotation=["RECVTR_translator_busy_R" ],datatype=numpy.bool_ )
# --------
# overloaded functions
@@ -194,9 +201,9 @@ class RECV(opcua_device):
# Cycle RCUs
self.RCU_off()
- self.wait_attribute("RCU_translator_busy_R", False, 5)
+ self.wait_attribute("RECVTR_translator_busy_R", False, 5)
self.RCU_on()
- self.wait_attribute("RCU_translator_busy_R", False, 5)
+ self.wait_attribute("RECVTR_translator_busy_R", False, 5)
def read_RCU_status_R(self):
""" Returns a set of strings denoting the status of each RCU.
diff --git a/devices/devices/unb2.py b/devices/devices/unb2.py
index 83cdd23948890bfa9a50e04f071c0d3c0a08645d..abf7692353afca713a11c179c35a00992cc95c63 100644
--- a/devices/devices/unb2.py
+++ b/devices/devices/unb2.py
@@ -47,94 +47,70 @@ class UNB2(opcua_device):
N_ddr = 2
N_qsfp = 6
- ### All CP/MP are in order of appearance in the ICD
- ### Central CP per Uniboard
-
- ### Some points are not working yet on the UNB2 or under discussion
- #XXX means Not working yet, but they are working on it
- ##XXX Means Under discussion
-
- # Special case for the on off switch: instead of UNB2_Power_ON_OFF_R we use UNB2_POL_FPGA_CORE_VOUT_R as the MP
- UNB2_Power_ON_OFF_RW = attribute_wrapper(comms_annotation=["2:UNB2_Power_ON_OFF_RW"], datatype=numpy.bool_, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
- UNB2_Front_Panel_LED_RW = attribute_wrapper(comms_annotation=["2:UNB2_Front_Panel_LED_RW"], datatype=numpy.uint8, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
- UNB2_Front_Panel_LED_R = attribute_wrapper(comms_annotation=["2:UNB2_Front_Panel_LED_R"], datatype=numpy.uint8, dims=(N_unb,))
- UNB2_mask_RW = attribute_wrapper(comms_annotation=["2:UNB2_mask_RW"], datatype=numpy.bool_, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
- # Not yet deployed
- #UNB2_mask_R = attribute_wrapper(comms_annotation=["2:UNB2_mask_R"], datatype=numpy.bool_, dims=(N_unb,))
-
- ### Central MP per Uniboard
- # These three are only available in UNB2c
- UNB2_I2C_bus_STATUS_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_STATUS_R"], datatype=numpy.bool_, dims=(N_unb,))
- ##UNB2_I2C_bus_STATUS_R will probably be renamed to UNB2_I2C_bus_OK_R
- ##UNB2_I2C_bus_OK_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_OK_R"], datatype=numpy.bool_, dims=(N_unb,))
- #UNB2_EEPROM_Serial_Number_R = attribute_wrapper(comms_annotation=["2:UNB2_EEPROM_Serial_Number_R"], datatype=numpy.str, dims=(N_unb,))
- UNB2_EEPROM_Unique_ID_R = attribute_wrapper(comms_annotation=["2:UNB2_EEPROM_Unique_ID_R"], datatype=numpy.uint32, dims=(N_unb,))
- UNB2_DC_DC_48V_12V_VIN_R = attribute_wrapper(comms_annotation=["2:UNB2_DC_DC_48V_12V_VIN_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_DC_DC_48V_12V_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_DC_DC_48V_12V_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_DC_DC_48V_12V_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_DC_DC_48V_12V_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_DC_DC_48V_12V_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_DC_DC_48V_12V_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N01_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N01_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N01_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N01_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N01_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N01_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N23_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N23_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N23_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N23_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_QSFP_N23_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_QSFP_N23_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_1V2_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_1V2_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_1V2_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_1V2_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_1V2_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_1V2_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_PHY_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_PHY_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_PHY_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_PHY_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_SWITCH_PHY_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_SWITCH_PHY_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_CLOCK_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_CLOCK_VOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_CLOCK_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_CLOCK_IOUT_R"], datatype=numpy.double, dims=(N_unb,))
- UNB2_POL_CLOCK_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_CLOCK_TEMP_R"], datatype=numpy.double, dims=(N_unb,))
-
- ### Local MP per FPGA
- UNB2_FPGA_DDR4_SLOT_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_DDR4_SLOT_TEMP_R"], datatype=numpy.double, dims=((N_fpga * N_ddr), N_unb))
- #UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R"], datatype=numpy.str, dims=(N_fpga * N_ddr), N_unb))
- #UNB2_FPGA_QSFP_CAGE_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_0_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_1_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_1_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_2_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_2_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_3_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_3_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_4_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_4_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_5_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_5_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_0_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_1_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_1_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_2_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_2_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_3_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_3_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_4_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_4_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_QSFP_CAGE_5_LOS_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_QSFP_CAGE_5_LOS_R"], datatype=numpy.uint8, dims=(N_fpga, N_unb))
- #UNB2_FPGA_POL_CORE_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_FPGA_CORE_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_CORE_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_CORE_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_CORE_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_CORE_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_ERAM_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_ERAM_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_ERAM_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_ERAM_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_ERAM_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_ERAM_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_RXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_RXGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_RXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_RXGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_RXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_RXGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_TXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_TXGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_TXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_TXGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- #UNB2_FPGA_POL_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_POL_FPGA_TXGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_HGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_HGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_HGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_PGM_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_PGM_VOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_PGM_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_PGM_IOUT_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
- UNB2_FPGA_POL_PGM_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_PGM_TEMP_R"], datatype=numpy.double, dims=(N_fpga, N_unb))
-
-
- ##UNB2_I2C_bus_QSFP_STATUS_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_QSFP_STATUS_R"], datatype=numpy.int64, dims=((N_unb * N_fpga), N_qsfp))
- ##UNB2_I2C_bus_DDR4_STATUS_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_DDR4_STATUS_R"], datatype=numpy.int64, dims=(N_ddr, N_fpga))
- ##UNB2_I2C_bus_FPGA_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_FPGA_PS_STATUS_R"], datatype=numpy.int64, dims=(N_unb * N_fpga,))
- ##UNB2_I2C_bus_PS_STATUS_R = attribute_wrapper(comms_annotation=["2:UNB2_I2C_bus_PS_STATUS_R"], datatype=numpy.double, dims=(N_unb,))
- ##UNB2_translator_busy_R = attribute_wrapper(comms_annotation=["2:UNB2_translator_busy_R"], datatype=numpy.bool_)
- ##UNB2_monitor_rate_RW = attribute_wrapper(comms_annotation=["2:UNB2_monitor_rate_RW"], datatype=numpy.double, dims=(N_unb,), access=AttrWriteType.READ_WRITE)
-
-
-
- # QualifiedName(2: UNB2_on)
- # QualifiedName(2: UNB2_off)
+ UNB2_mask_RW_default = device_property(
+ dtype='DevVarBooleanArray',
+ mandatory=False,
+ default_value=[True] * 2
+ )
+
+ first_default_settings = [
+ # set the masks first, as those filter any subsequent settings
+ 'UNB2_mask_RW'
+ ]
+
+ UNB2TR_translator_busy_R = attribute_wrapper(comms_annotation=["UNB2TR_translator_busy_R" ],datatype=numpy.bool_ )
+ UNB2_DC_DC_48V_12V_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_DC_DC_48V_12V_IOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_DC_DC_48V_12V_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_DC_DC_48V_12V_TEMP_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_DC_DC_48V_12V_VIN_R = attribute_wrapper(comms_annotation=["UNB2_DC_DC_48V_12V_VIN_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_DC_DC_48V_12V_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_DC_DC_48V_12V_VOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_EEPROM_Serial_Number_R = attribute_wrapper(comms_annotation=["UNB2_EEPROM_Serial_Number_R"],datatype=str , dims=(2,))
+ UNB2_EEPROM_Unique_ID_R = attribute_wrapper(comms_annotation=["UNB2_EEPROM_Unique_ID_R" ],datatype=numpy.int64 , dims=(2,))
+ UNB2_FPGA_DDR4_SLOT_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_DDR4_SLOT_TEMP_R"],datatype=numpy.float64, dims=(16,))
+ UNB2_FPGA_POL_CORE_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_CORE_IOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_CORE_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_CORE_TEMP_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_CORE_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_CORE_VOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_ERAM_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_ERAM_IOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_ERAM_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_ERAM_TEMP_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_ERAM_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_ERAM_VOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_HGXB_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_HGXB_IOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_HGXB_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_HGXB_TEMP_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_HGXB_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_HGXB_VOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_PGM_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_PGM_IOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_PGM_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_PGM_TEMP_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_PGM_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_PGM_VOUT_R" ],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_RXGXB_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_RXGXB_IOUT_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_RXGXB_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_RXGXB_TEMP_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_RXGXB_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_RXGXB_VOUT_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_TXGXB_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_TXGXB_IOUT_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_TXGXB_TEMP_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_POL_TXGXB_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_POL_TXGXB_VOUT_R"],datatype=numpy.float64, dims=(8,))
+ UNB2_FPGA_QSFP_CAGE_LOS_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_QSFP_CAGE_LOS_R" ],datatype=numpy.int64 , dims=(48,))
+ UNB2_FPGA_QSFP_CAGE_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_FPGA_QSFP_CAGE_TEMP_R"],datatype=numpy.float64, dims=(48,))
+ UNB2_Front_Panel_LED_R = attribute_wrapper(comms_annotation=["UNB2_Front_Panel_LED_R" ],datatype=numpy.int64 , dims=(2,))
+ UNB2_Front_Panel_LED_RW = attribute_wrapper(comms_annotation=["UNB2_Front_Panel_LED_RW" ],datatype=numpy.int64 , dims=(2,), access=AttrWriteType.READ_WRITE)
+ UNB2_I2C_bus_DDR4_error_R = attribute_wrapper(comms_annotation=["UNB2_I2C_bus_DDR4_error_R" ],datatype=numpy.int64 , dims=(8,))
+ UNB2_I2C_bus_error_R = attribute_wrapper(comms_annotation=["UNB2_I2C_bus_error_R" ],datatype=numpy.int64 , dims=(2,))
+ UNB2_I2C_bus_FPGA_PS_error_R = attribute_wrapper(comms_annotation=["UNB2_I2C_bus_FPGA_PS_error_R"],datatype=numpy.int64 , dims=(8,))
+ UNB2_I2C_bus_PS_error_R = attribute_wrapper(comms_annotation=["UNB2_I2C_bus_PS_error_R" ],datatype=numpy.int64 , dims=(2,))
+ UNB2_I2C_bus_QSFP_error_R = attribute_wrapper(comms_annotation=["UNB2_I2C_bus_QSFP_error_R" ],datatype=numpy.int64 , dims=(48,))
+ UNB2_mask_RW = attribute_wrapper(comms_annotation=["UNB2_mask_RW" ],datatype=numpy.bool_ , dims=(2,), access=AttrWriteType.READ_WRITE)
+ UNB2_POL_CLOCK_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_CLOCK_IOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_CLOCK_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_POL_CLOCK_TEMP_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_CLOCK_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_CLOCK_VOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N01_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N01_IOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N01_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N01_TEMP_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N01_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N01_VOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N23_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N23_IOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N23_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N23_TEMP_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_QSFP_N23_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_QSFP_N23_VOUT_R" ],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_1V2_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_1V2_IOUT_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_1V2_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_1V2_TEMP_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_1V2_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_1V2_VOUT_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_PHY_IOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_PHY_IOUT_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_PHY_TEMP_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_PHY_TEMP_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_POL_SWITCH_PHY_VOUT_R = attribute_wrapper(comms_annotation=["UNB2_POL_SWITCH_PHY_VOUT_R"],datatype=numpy.float64, dims=(2,))
+ UNB2_PWR_off_R = attribute_wrapper(comms_annotation=["UNB2_PWR_off_R" ],datatype=numpy.bool_ , dims=(2,))
+ UNB2_PWR_off_RW = attribute_wrapper(comms_annotation=["UNB2_PWR_off_RW" ],datatype=numpy.bool_ , dims=(2,), access=AttrWriteType.READ_WRITE)
# --------
# overloaded functions
diff --git a/docker-compose/grafana/dashboards/home.json b/docker-compose/grafana/dashboards/home.json
index 51ed27cc87098fa85f7563d813c6807eb18a7b3d..413ccbfdb21893dcb086b18168cdb1e99bfabefd 100644
--- a/docker-compose/grafana/dashboards/home.json
+++ b/docker-compose/grafana/dashboards/home.json
@@ -679,14 +679,14 @@
"targets": [
{
"exemplar": true,
- "expr": "1-device_attribute{device=\"lts/recv/1\",name=\"CLK_Enable_PWR_R\"}",
+ "expr": "1-device_attribute{device=\"lts/apsct/1\",name=\"APSCT_PWR_on_R\"}",
"interval": "",
"legendFormat": "Power",
"refId": "A"
},
{
"exemplar": true,
- "expr": "device_attribute{device=\"lts/recv/1\",name=\"CLK_I2C_STATUS_R\"}",
+ "expr": "device_attribute{device=\"lts/apsct/1\",name=\"APSCT_I2C_error_R\"}",
"hide": false,
"interval": "",
"legendFormat": "I2C",
@@ -694,7 +694,7 @@
},
{
"exemplar": true,
- "expr": "device_attribute{device=\"lts/recv/1\",name=\"CLK_PLL_error_R\"}",
+ "expr": "device_attribute{device=\"lts/apsct/1\",name=\"APSCT_PLL_200MHz_error_R\"}",
"hide": false,
"interval": "",
"legendFormat": "PLL",
@@ -702,7 +702,7 @@
},
{
"exemplar": true,
- "expr": "1-device_attribute{device=\"lts/recv/1\",name=\"CLK_PLL_locked_R\"}",
+ "expr": "1-device_attribute{device=\"lts/apsct/1\",name=\"APSCT_PLL_200MHz_locked_R\"}",
"hide": false,
"interval": "",
"legendFormat": "PLL Lock",
@@ -824,7 +824,7 @@
},
{
"exemplar": true,
- "expr": "device_attribute{device=\"lts/unb2/1\",name=\"UNB2_FPGA_POL_HXGB_TEMP_R\"}",
+ "expr": "device_attribute{device=\"lts/unb2/1\",name=\"UNB2_FPGA_POL_TXGB_TEMP_R\"}",
"hide": false,
"interval": "",
"legendFormat": "TrHx board {{x}} node {{y}}",
@@ -1069,7 +1069,7 @@
},
{
"exemplar": true,
- "expr": "device_attribute{device=\"lts/unb2/1\",name=\"UNB2_FPGA_POL_HXGB_VOUT_R\"}",
+ "expr": "device_attribute{device=\"lts/unb2/1\",name=\"UNB2_FPGA_POL_TXGB_VOUT_R\"}",
"hide": false,
"interval": "",
"legendFormat": "TrHx board {{x}} node {{y}}",