diff --git a/README.md b/README.md
index 977f70905bc3d84550590e2002dc539bdba2845c..7794874fc30ad93b82461f5e419e1aab9324aa86 100644
--- a/README.md
+++ b/README.md
@@ -166,6 +166,7 @@ Next change the version in the following places:
# Release Notes
+* 0.27.2 Add new attributes in OPCUA devices
* 0.27.1 Bugfixes / rollout fixes
* 0.27.0 Replace device_attribute with a per-attribute metric
* 0.26.7 Add monitoring of White Rabbit switch and power converters (PCON) using SNMP
diff --git a/tangostationcontrol/VERSION b/tangostationcontrol/VERSION
index 83b47304980e356e4efa162531e9e51eec77761f..3edc695dcea5c89ff59d72a47fd30323fcfaa016 100644
--- a/tangostationcontrol/VERSION
+++ b/tangostationcontrol/VERSION
@@ -1 +1 @@
-0.27.1
+0.27.2
diff --git a/tangostationcontrol/tangostationcontrol/common/constants.py b/tangostationcontrol/tangostationcontrol/common/constants.py
index 2f2c6ffbff9da63bd53196facc21655f47c8b6d0..0331b8ee0057f8f95dceab1fb68462d71d5994a0 100644
--- a/tangostationcontrol/tangostationcontrol/common/constants.py
+++ b/tangostationcontrol/tangostationcontrol/common/constants.py
@@ -15,6 +15,15 @@ A_pn = 6
# signal inputs per FPGA ( A_pn * N_pol )
S_pn = A_pn * N_pol
+# number of FIR (Finite Impulse Response) filter taps
+N_tap = 16
+
+# number of FFT blocks
+N_fft = 1024
+
+# number of FPGA flash pages size
+N_fps = 16384
+
# Highest number antennas we support
MAX_ANTENNA = N_pn * A_pn
diff --git a/tangostationcontrol/tangostationcontrol/devices/apsct.py b/tangostationcontrol/tangostationcontrol/devices/apsct.py
index d1d3df274743a2e592d56cc93a22fc41759ff8e3..b17a82068d51fae576c317861e4e409afdfd80fa 100644
--- a/tangostationcontrol/tangostationcontrol/devices/apsct.py
+++ b/tangostationcontrol/tangostationcontrol/devices/apsct.py
@@ -77,6 +77,11 @@ class APSCT(OPCUADevice):
APSCTTR_translator_busy_R = AttributeWrapper(
comms_annotation=["APSCTTR_translator_busy_R"], datatype=bool
)
+ LMP_ID_R = AttributeWrapper(
+ comms_annotation=["LMP_ID_R"],
+ datatype=numpy.int64,
+ doc="Midplane ID (updated on startup or any method call)",
+ )
APSCT_INPUT_10MHz_good_R = AttributeWrapper(
comms_annotation=["APSCT_INPUT_10MHz_good_R"], datatype=bool
)
diff --git a/tangostationcontrol/tangostationcontrol/devices/sdp/beamlet.py b/tangostationcontrol/tangostationcontrol/devices/sdp/beamlet.py
index b2cd3c6545ef54d819e21b611b807ee296f0c06b..dd1e99c061e340219c75f41b464686f07c313b99 100644
--- a/tangostationcontrol/tangostationcontrol/devices/sdp/beamlet.py
+++ b/tangostationcontrol/tangostationcontrol/devices/sdp/beamlet.py
@@ -55,6 +55,8 @@ logger = logging.getLogger()
]
)
class Beamlet(OPCUADevice):
+ """Beamlet Device Server for LOFAR2.0"""
+
# -----------------
# Device Properties
# -----------------
@@ -358,6 +360,30 @@ class Beamlet(OPCUADevice):
dims=(N_pn, N_beamsets_ctrl),
access=AttrWriteType.READ_WRITE,
)
+ FPGA_bf_ring_rx_clear_total_counts_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_clear_total_counts_R"],
+ datatype=bool,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_clear_total_counts_RW = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_clear_total_counts_RW"],
+ datatype=bool,
+ dims=(N_pn, N_beamsets_ctrl),
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ # Beam Former Weights raw data
+ FPGA_bf_weights_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_weights_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn, N_beamsets_ctrl, N_pol, A_pn, N_pol, N_beamlets_ctrl),
+ )
+ FPGA_bf_weights_RW = AttributeWrapper(
+ comms_annotation=["FPGA_bf_weights_RW"],
+ datatype=numpy.uint32,
+ dims=(N_pn, N_beamsets_ctrl, N_pol, A_pn, N_pol, N_beamlets_ctrl),
+ access=AttrWriteType.READ_WRITE,
+ )
# cint16[N_pn][A_pn][N_pol][N_beamlets_ctrl]
# Co-polarization BF weights. The N_pol = 2 parameter index is:
@@ -510,6 +536,88 @@ class Beamlet(OPCUADevice):
dims=(N_pn, N_beamsets_ctrl, P_sum),
)
+ FPGA_bf_aligned_bsn_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_aligned_bsn_R"],
+ datatype=numpy.int64,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_aligned_nof_packets_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_aligned_nof_packets_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_aligned_nof_valid_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_aligned_nof_valid_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_aligned_latency_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_aligned_latency_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_tx_bsn_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_tx_bsn_R"],
+ datatype=numpy.int64,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_tx_nof_packets_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_tx_nof_packets_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_tx_nof_valid_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_tx_nof_valid_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_tx_latency_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_tx_latency_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+
+ FPGA_bf_ring_rx_total_nof_packets_received_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_total_nof_packets_received_R"],
+ datatype=numpy.uint64,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_total_nof_packets_discarded_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_total_nof_packets_discarded_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_total_nof_sync_received_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_total_nof_sync_received_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_total_nof_sync_discarded_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_total_nof_sync_discarded_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_bsn_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_bsn_R"],
+ datatype=numpy.int64,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_nof_packets_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_nof_packets_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_nof_valid_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_nof_valid_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+ FPGA_bf_ring_rx_latency_R = AttributeWrapper(
+ comms_annotation=["FPGA_bf_ring_rx_latency_R"],
+ datatype=numpy.int32,
+ dims=(N_pn, N_beamsets_ctrl),
+ )
+
subband_select_RW = attribute(
dtype=(numpy.uint32,),
max_dim_x=N_beamlets_ctrl,
@@ -524,7 +632,8 @@ class Beamlet(OPCUADevice):
@staticmethod
def _beamlet_output_defaults(properties) -> Dict[str, object]:
- """Return the defaults for FPGA_beamlet_output_multiple_hdr_* based on shorthand defaults."""
+ """Return the defaults for FPGA_beamlet_output_multiple_hdr_*
+ based on shorthand defaults."""
# --- Configure FPGA destination streams equally for all 16 FPGAs
# NB: For this to properly take, sdp_proxy.FPGA_processing_enable_RW needs to transition False -> True
diff --git a/tangostationcontrol/tangostationcontrol/devices/sdp/firmware.py b/tangostationcontrol/tangostationcontrol/devices/sdp/firmware.py
index 3f893f0d8b213d9134ae18c20e0f9465ae85f233..9df30ad7518a80066b5e3cf5398e9775b573a2b5 100644
--- a/tangostationcontrol/tangostationcontrol/devices/sdp/firmware.py
+++ b/tangostationcontrol/tangostationcontrol/devices/sdp/firmware.py
@@ -18,6 +18,7 @@ from tango.server import device_property, attribute
from tangostationcontrol.common.constants import (
N_pn,
S_pn,
+ A_pn,
CLK_200_MHZ,
CLK_160_MHZ,
N_subbands,
@@ -137,6 +138,17 @@ class SDPFirmware(OPCUADevice):
dims=(N_pn,),
access=AttrWriteType.READ_WRITE,
)
+ FPGA_flash_addr_R = AttributeWrapper(
+ comms_annotation=["FPGA_flash_addr_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ )
+ FPGA_flash_addr_RW = AttributeWrapper(
+ comms_annotation=["FPGA_flash_addr_RW"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ access=AttrWriteType.READ_WRITE,
+ )
FPGA_flash_protect_R = AttributeWrapper(
comms_annotation=["FPGA_flash_protect_R"],
datatype=numpy.uint32,
@@ -150,6 +162,18 @@ class SDPFirmware(OPCUADevice):
access=AttrWriteType.READ_WRITE,
doc="Protect (0) or unprotect (1) writing the factory image",
)
+ FPGA_flash_erase_R = AttributeWrapper(
+ comms_annotation=["FPGA_flash_erase_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ )
+ FPGA_flash_erase_RW = AttributeWrapper(
+ comms_annotation=["FPGA_flash_erase_RW"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ access=AttrWriteType.READ_WRITE,
+ )
+
FPGA_scrap_R = AttributeWrapper(
comms_annotation=["FPGA_scrap_R"],
datatype=numpy.int32,
@@ -184,6 +208,9 @@ class SDPFirmware(OPCUADevice):
FPGA_pps_capture_cnt_R = AttributeWrapper(
comms_annotation=["FPGA_pps_capture_cnt_R"], datatype=numpy.uint32, dims=(N_pn,)
)
+ FPGA_pps_error_cnt_R = AttributeWrapper(
+ comms_annotation=["FPGA_pps_error_cnt_R"], datatype=numpy.uint32, dims=(N_pn,)
+ )
FPGA_pps_expected_cnt_R = AttributeWrapper(
comms_annotation=["FPGA_pps_expected_cnt_R"],
datatype=numpy.uint32,
@@ -211,6 +238,24 @@ class SDPFirmware(OPCUADevice):
comms_annotation=["FPGA_temp_R"], datatype=numpy.double, dims=(N_pn,)
)
+ # UCP (Uniboard Control Protocol)
+ FPGA_ucp_block_comm_R = AttributeWrapper(
+ comms_annotation=["FPGA_ucp_block_comm_R"],
+ datatype=bool,
+ dims=(N_pn,),
+ )
+ FPGA_ucp_block_comm_RW = AttributeWrapper(
+ comms_annotation=["FPGA_ucp_block_comm_RW"],
+ datatype=bool,
+ dims=(N_pn,),
+ access=AttrWriteType.READ_WRITE,
+ )
+ FPGA_ucp_status_R = AttributeWrapper(
+ comms_annotation=["FPGA_ucp_status_R"],
+ datatype=numpy.uint64,
+ dims=(N_pn, A_pn),
+ )
+
@attribute(
access=AttrWriteType.READ,
dtype=str,
diff --git a/tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py b/tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
index f537564b961bafe2a5513c1ad0e01a7316e9d6d7..1bcf4581d08e8f95d5f66a1139700fd36cc2c7be 100644
--- a/tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
+++ b/tangostationcontrol/tangostationcontrol/devices/sdp/sdp.py
@@ -304,7 +304,6 @@ class SDP(OPCUADevice):
dims=(N_pn, S_pn, N_subbands),
access=AttrWriteType.READ_WRITE,
)
-
FPGA_wg_amplitude_R = AttributeWrapper(
comms_annotation=["FPGA_wg_amplitude_R"],
datatype=numpy.double,
@@ -383,6 +382,17 @@ class SDP(OPCUADevice):
datatype=numpy.uint32,
dims=(N_pn, S_pn),
)
+ FPGA_jesd_ctrl_R = AttributeWrapper(
+ comms_annotation=["FPGA_jesd_ctrl_R"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ )
+ FPGA_jesd_ctrl_RW = AttributeWrapper(
+ comms_annotation=["FPGA_jesd_ctrl_RW"],
+ datatype=numpy.uint32,
+ dims=(N_pn,),
+ access=AttrWriteType.READ_WRITE,
+ )
FPGA_signal_input_bsn_R = AttributeWrapper(
comms_annotation=["FPGA_signal_input_bsn_R"], datatype=numpy.int64, dims=(N_pn,)
diff --git a/tangostationcontrol/tangostationcontrol/devices/sdp/xst.py b/tangostationcontrol/tangostationcontrol/devices/sdp/xst.py
index c19f1a31e3c6efbb3332e2694e2402f0641c76e9..94e55aa3a7ad74da5c6d98d98c333ebc9e72319c 100644
--- a/tangostationcontrol/tangostationcontrol/devices/sdp/xst.py
+++ b/tangostationcontrol/tangostationcontrol/devices/sdp/xst.py
@@ -178,6 +178,18 @@ class XST(Statistics):
datatype=numpy.uint16,
dims=(N_pn,),
)
+ FPGA_xst_input_bsn_at_sync_R = AttributeWrapper(
+ comms_id=OPCUAConnection,
+ comms_annotation=["FPGA_xst_input_bsn_at_sync_R"],
+ datatype=numpy.int64,
+ dims=(N_pn,),
+ )
+ FPGA_xst_output_sync_bsn_R = AttributeWrapper(
+ comms_id=OPCUAConnection,
+ comms_annotation=["FPGA_xst_output_sync_bsn_R"],
+ datatype=numpy.int64,
+ dims=(N_pn,),
+ )
FPGA_xst_offload_bsn_R = AttributeWrapper(
comms_id=OPCUAConnection,
comms_annotation=["FPGA_xst_offload_bsn_R"],
diff --git a/tangostationcontrol/tangostationcontrol/devices/unb2.py b/tangostationcontrol/tangostationcontrol/devices/unb2.py
index 125f0c04701cb694ff1ff412c9fa2dc5c21ec0f2..55d9309721dc9ea957d1c31b4a4884a3073bb627 100644
--- a/tangostationcontrol/tangostationcontrol/devices/unb2.py
+++ b/tangostationcontrol/tangostationcontrol/devices/unb2.py
@@ -239,6 +239,18 @@ class UNB2(OPCUADevice):
dims=(N_unb,),
access=AttrWriteType.READ_WRITE,
)
+ UNB2_I2C_enabled_R = AttributeWrapper(
+ comms_annotation=["UNB2_I2C_enabled_R"], datatype=bool, dims=(N_unb,)
+ )
+ UNB2_I2C_reset_R = AttributeWrapper(
+ comms_annotation=["UNB2_I2C_reset_R"], datatype=bool, dims=(N_unb,)
+ )
+ UNB2_I2C_reset_RW = AttributeWrapper(
+ comms_annotation=["UNB2_I2C_reset_RW"],
+ datatype=bool,
+ dims=(N_unb,),
+ access=AttrWriteType.READ_WRITE,
+ )
UNB2_mask_RW = AttributeWrapper(
comms_annotation=["UNB2_mask_RW"],
datatype=bool,