diff --git a/RCUSCC/RCUSCC/RCUSCC.py b/RCUSCC/RCUSCC/RCUSCC.py
index 4802f8e2194b9dff18eab94f2091296128fe83bd..b5982e1328fb3cac3c2fb38c1b9e263cf845968c 100644
--- a/RCUSCC/RCUSCC/RCUSCC.py
+++ b/RCUSCC/RCUSCC/RCUSCC.py
@@ -80,6 +80,148 @@ class RCUSCC(Device):
dtype='DevLong64',
)
+ RCU_00_Att0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Att0_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Att1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Att1_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Att2_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Att2_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Pwr_dig_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Pwr_dig_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Pwr_dig_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Pwr_Ant0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Pwr_Ant0_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Pwr_Ant1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Pwr_Ant1_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Pwr_Ant2_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Pwr_Ant2_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Band0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Band0_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Band1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Band1_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_Band2_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_Band2_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_LED0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_LED0_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_LED1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_LED1_RW = attribute(
+ dtype='DevDouble',
+ access=AttrWriteType.READ_WRITE,
+ )
+
+ RCU_00_ADC_lock0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_ADC_lock1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_ADC_lock2_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_V_2v5_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_I_Ant0_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_I_Ant1_R = attribute(
+ dtype='DevDouble',
+ )
+
+ RCU_00_I_Ant2_R = attribute(
+ dtype='DevDouble',
+ )
+
+
# ---------------
# General methods
# ---------------
@@ -97,9 +239,103 @@ class RCUSCC(Device):
# the mapping.
self._time_offset_rw = 0
self.attribute_mapping["_time_offset_rw"] = {}
+
self._time_offset_r = 0
self.attribute_mapping["_time_offset_r"] = {}
+ self._RCU_00_Att0_R = 0
+ self.attribute_mapping["_RCU_00_Att0_R"] = {}
+
+ self._RCU_00_Att0_RW = 0
+ self.attribute_mapping["_RCU_00_Att0_RW"] = {}
+
+ self._RCU_00_Att1_R = 0
+ self.attribute_mapping["_RCU_00_Att1_R"] = {}
+
+ self._RCU_00_Att1_RW = 0
+ self.attribute_mapping["_RCU_00_Att1_RW"] = {}
+
+ self._RCU_00_Att2_R = 0
+ self.attribute_mapping["_RCU_00_Att2_R"] = {}
+
+ self._RCU_00_Att2_RW = 0
+ self.attribute_mapping["_RCU_00_Att2_RW"] = {}
+
+ self._RCU_00_Pwr_dig_R = 0
+ self.attribute_mapping["_RCU_00_Pwr_dig_R"] = {}
+
+ self._RCU_00_Pwr_dig_RW = 0
+ self.attribute_mapping["_RCU_00_Pwr_dig_RW"] = {}
+
+ self._RCU_00_Pwr_Ant0_R = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant0_R"] = {}
+
+ self._RCU_00_Pwr_Ant0_RW = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant0_RW"] = {}
+
+ self._RCU_00_Pwr_Ant1_R = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant1_R"] = {}
+
+ self._RCU_00_Pwr_Ant1_RW = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant1_RW"] = {}
+
+ self._RCU_00_Pwr_Ant2_R = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant2_R"] = {}
+
+ self._RCU_00_Pwr_Ant2_RW = 0
+ self.attribute_mapping["_RCU_00_Pwr_Ant2_RW"] = {}
+
+ self._RCU_00_Band0_R = 0
+ self.attribute_mapping["_RCU_00_Band0_R"] = {}
+
+ self._RCU_00_Band0_RW = 0
+ self.attribute_mapping["_RCU_00_Band0_RW"] = {}
+
+ self._RCU_00_Band1_R = 0
+ self.attribute_mapping["_RCU_00_Band1_R"] = {}
+
+ self._RCU_00_Band1_RW = 0
+ self.attribute_mapping["_RCU_00_Band1_RW"] = {}
+
+ self._RCU_00_Band2_R = 0
+ self.attribute_mapping["_RCU_00_Band2_R"] = {}
+
+ self._RCU_00_Band2_RW = 0
+ self.attribute_mapping["_RCU_00_Band2_RW"] = {}
+
+ self._RCU_00_LED0_R = 0
+ self.attribute_mapping["_RCU_00_LED0_R"] = {}
+
+ self._RCU_00_LED0_RW = 0
+ self.attribute_mapping["_RCU_00_LED0_RW"] = {}
+
+ self._RCU_00_LED1_R = 0
+ self.attribute_mapping["_RCU_00_LED1_R"] = {}
+
+ self._RCU_00_LED1_RW = 0
+ self.attribute_mapping["_RCU_00_LED1_RW"] = {}
+
+ self._RCU_00_ADC_lock0_R = 0
+ self.attribute_mapping["_RCU_00_ADC_lock0_R"] = {}
+
+ self._RCU_00_ADC_lock1_R = 0
+ self.attribute_mapping["_RCU_00_ADC_lock1_R"] = {}
+
+ self._RCU_00_ADC_lock2_R = 0
+ self.attribute_mapping["_RCU_00_ADC_lock2_R"] = {}
+
+ self._RCU_00_V_2v5_R = 0
+ self.attribute_mapping["_RCU_00_V_2v5_R"] = {}
+
+ self._RCU_00_I_Ant0_R = 0
+ self.attribute_mapping["_RCU_00_I_Ant0_R"] = {}
+
+ self._RCU_00_I_Ant1_R = 0
+ self.attribute_mapping["_RCU_00_I_Ant1_R"] = {}
+
+ self._RCU_00_I_Ant2_R = 0
+ self.attribute_mapping["_RCU_00_I_Ant2_R"] = {}
+
# Set defaults to property values.
try:
@@ -118,9 +354,73 @@ class RCUSCC(Device):
self.obj_node = self.client.get_objects_node()
self.debug_stream("Mapping OPC-UA MP/CP to attributes...")
- attribute_name = "time_offset"
+
self.attribute_mapping["_time_offset_rw"] = self.obj_node.get_child([ "{}:time_offset".format(self.name_space_index), "{}:time_offset_RW".format(self.name_space_index)])
+
self.attribute_mapping["_time_offset_r"] = self.obj_node.get_child([ "{}:time_offset".format(self.name_space_index), "{}:time_offset_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att0_R"] = self.obj_node.get_child([ "{}:RCU_00_Att0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att0_RW"] = self.obj_node.get_child([ "{}:RCU_00_Att0_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att1_R"] = self.obj_node.get_child([ "{}:RCU_00_Att1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att1_RW"] = self.obj_node.get_child([ "{}:RCU_00_Att1_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att2_R"] = self.obj_node.get_child([ "{}:RCU_00_Att2_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Att2_RW"] = self.obj_node.get_child([ "{}:RCU_00_Att2_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_dig_R"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_dig_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_dig_RW"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_dig_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant0_R"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant0_RW"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant0_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant1_R"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant1_RW"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant1_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant2_R"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant2_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Pwr_Ant2_RW"] = self.obj_node.get_child([ "{}:RCU_00_Pwr_Ant2_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band0_R"] = self.obj_node.get_child([ "{}:RCU_00_Band0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band0_RW"] = self.obj_node.get_child([ "{}:RCU_00_Band0_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band1_R"] = self.obj_node.get_child([ "{}:RCU_00_Band1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band1_RW"] = self.obj_node.get_child([ "{}:RCU_00_Band1_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band2_R"] = self.obj_node.get_child([ "{}:RCU_00_Band2_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_Band2_RW"] = self.obj_node.get_child([ "{}:RCU_00_Band2_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_LED0_R"] = self.obj_node.get_child([ "{}:RCU_00_LED0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_LED0_RW"] = self.obj_node.get_child([ "{}:RCU_00_LED0_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_LED1_R"] = self.obj_node.get_child([ "{}:RCU_00_LED1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_LED1_RW"] = self.obj_node.get_child([ "{}:RCU_00_LED1_RW".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_ADC_lock0_R"] = self.obj_node.get_child([ "{}:RCU_00_ADC_lock0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_ADC_lock1_R"] = self.obj_node.get_child([ "{}:RCU_00_ADC_lock1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_ADC_lock2_R"] = self.obj_node.get_child([ "{}:RCU_00_ADC_lock2_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_V_2v5_R"] = self.obj_node.get_child([ "{}:RCU_00_V_2v5_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_I_Ant0_R"] = self.obj_node.get_child([ "{}:RCU_00_I_Ant0_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_I_Ant1_R"] = self.obj_node.get_child([ "{}:RCU_00_I_Ant1_R".format(self.name_space_index)])
+
+ self.attribute_mapping["_RCU_00_I_Ant2_R"] = self.obj_node.get_child([ "{}:RCU_00_I_Ant2_R".format(self.name_space_index)])
+
self.debug_stream("Mapping OPC-UA MP/CP to attributes done.")
self.set_state(DevState.ON)
except Exception as e:
@@ -174,6 +474,306 @@ class RCUSCC(Device):
return self._time_offset_r
# PROTECTED REGION END # // RCUSCC.time_offset_r_read
+ def read_RCU_00_Att0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att0_R_read) ENABLED START #
+ """Return the RCU_00_Att0_R attribute."""
+ self._RCU_00_Att0_R = self.attribute_mapping["_RCU_00_Att0_R"].get_value()
+ return self._RCU_00_Att0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att0_R_read
+
+ def read_RCU_00_Att0_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att0_RW_read) ENABLED START #
+ """Return the RCU_00_Att0_RW attribute."""
+ return self._RCU_00_Att0_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att0_RW_read
+
+ def write_RCU_00_Att0_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att0_RW_write) ENABLED START #
+ """Set the RCU_00_Att0_RW attribute."""
+ self.attribute_mapping["_RCU_00_Att0_RW"].set_value(value)
+ self._RCU_00_Att0_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att0_RW_write
+
+ def read_RCU_00_Att1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att1_R_read) ENABLED START #
+ """Return the RCU_00_Att1_R attribute."""
+ self._RCU_00_Att1_R = self.attribute_mapping["_RCU_00_Att1_R"].get_value()
+ return self._RCU_00_Att1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att1_R_read
+
+ def read_RCU_00_Att1_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att1_RW_read) ENABLED START #
+ """Return the RCU_00_Att1_RW attribute."""
+ self._RCU_00_Att1_RW = self.attribute_mapping["_RCU_00_Att1_RW"].get_value()
+ return self._RCU_00_Att1_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att1_RW_read
+
+ def write_RCU_00_Att1_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att1_RW_write) ENABLED START #
+ """Set the RCU_00_Att1_RW attribute."""
+ self.attribute_mapping["_RCU_00_Att1_RW"].set_value(value)
+ self._RCU_00_Att1_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att1_RW_write
+
+ def read_RCU_00_Att2_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att2_R_read) ENABLED START #
+ """Return the RCU_00_Att2_R attribute."""
+ self._RCU_00_Att2_R = self.attribute_mapping["_RCU_00_Att2_R"].get_value()
+ return self._RCU_00_Att2_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att2_R_read
+
+ def read_RCU_00_Att2_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att2_RW_read) ENABLED START #
+ """Return the RCU_00_Att2_RW attribute."""
+ self._RCU_00_Att2_RW = self.attribute_mapping["_RCU_00_Att2_RW"].get_value()
+ return self._RCU_00_Att2_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att2_RW_read
+
+ def write_RCU_00_Att2_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Att2_RW_write) ENABLED START #
+ """Set the RCU_00_Att2_RW attribute."""
+ self.attribute_mapping["_RCU_00_Att2_RW"].set_value(value)
+ self._RCU_00_Att2_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Att2_RW_write
+
+ def read_RCU_00_Pwr_dig_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_dig_R_read) ENABLED START #
+ """Return the RCU_00_Pwr_dig_R attribute."""
+ self._RCU_00_Pwr_dig_R = self.attribute_mapping["_RCU_00_Pwr_dig_R"].get_value()
+ return self._RCU_00_Pwr_dig_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_dig_R_read
+
+ def read_RCU_00_Pwr_dig_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_dig_RW_read) ENABLED START #
+ """Return the RCU_00_Pwr_dig_RW attribute."""
+ self._RCU_00_Pwr_dig_RW = self.attribute_mapping["_RCU_00_Pwr_dig_RW"].get_value()
+ return self._RCU_00_Pwr_dig_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_dig_RW_read
+
+ def write_RCU_00_Pwr_dig_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_dig_RW_write) ENABLED START #
+ """Set the RCU_00_Pwr_dig_RW attribute."""
+ self.attribute_mapping["_RCU_00_Pwr_dig_RW"].set_value(value)
+ self._RCU_00_Pwr_dig_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_dig_RW_write
+
+ def read_RCU_00_Pwr_Ant0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant0_R_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant0_R attribute."""
+ self._RCU_00_Pwr_Ant0_R = self.attribute_mapping["_RCU_00_Pwr_Ant0_R"].get_value()
+ return self._RCU_00_Pwr_Ant0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant0_R_read
+
+ def read_RCU_00_Pwr_Ant0_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant0_RW_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant0_RW attribute."""
+ self._RCU_00_Pwr_Ant0_RW = self.attribute_mapping["_RCU_00_Pwr_Ant0_RW"].get_value()
+ return self._RCU_00_Pwr_Ant0_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant0_RW_read
+
+ def write_RCU_00_Pwr_Ant0_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant0_RW_write) ENABLED START #
+ """Set the RCU_00_Pwr_Ant0_RW attribute."""
+ self.attribute_mapping["_RCU_00_Pwr_Ant0_RW"].set_value(value)
+ self._RCU_00_Pwr_Ant0_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant0_RW_write
+
+ def read_RCU_00_Pwr_Ant1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant1_R_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant1_R attribute."""
+ self._RCU_00_Pwr_Ant1_R = self.attribute_mapping["_RCU_00_Pwr_Ant1_R"].get_value()
+ return self._RCU_00_Pwr_Ant1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant1_R_read
+
+ def read_RCU_00_Pwr_Ant1_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant1_RW_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant1_RW attribute."""
+ self._RCU_00_Pwr_Ant1_RW = self.attribute_mapping["_RCU_00_Pwr_Ant1_RW"].get_value()
+ return self._RCU_00_Pwr_Ant1_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant1_RW_read
+
+ def write_RCU_00_Pwr_Ant1_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant1_RW_write) ENABLED START #
+ """Set the RCU_00_Pwr_Ant1_RW attribute."""
+ self.attribute_mapping["_RCU_00_Pwr_Ant1_RW"].set_value(value)
+ self._RCU_00_Pwr_Ant1_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant1_RW_write
+
+ def read_RCU_00_Pwr_Ant2_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant2_R_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant2_R attribute."""
+ self._RCU_00_Pwr_Ant2_R = self.attribute_mapping["_RCU_00_Pwr_Ant2_R"].get_value()
+ return self._RCU_00_Pwr_Ant2_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant2_R_read
+
+ def read_RCU_00_Pwr_Ant2_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant2_RW_read) ENABLED START #
+ """Return the RCU_00_Pwr_Ant2_RW attribute."""
+ self._RCU_00_Pwr_Ant2_RW = self.attribute_mapping["_RCU_00_Pwr_Ant2_RW"].get_value()
+ return self._RCU_00_Pwr_Ant2_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant2_RW_read
+
+ def write_RCU_00_Pwr_Ant2_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Pwr_Ant2_RW_write) ENABLED START #
+ """Set the RCU_00_Pwr_Ant2_RW attribute."""
+ self.attribute_mapping["_RCU_00_Pwr_Ant2_RW"].set_value(value)
+ self._RCU_00_Pwr_Ant2_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Pwr_Ant2_RW_write
+
+ def read_RCU_00_Band0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band0_R_read) ENABLED START #
+ """Return the RCU_00_Band0_R attribute."""
+ self._RCU_00_Band0_R = self.attribute_mapping["_RCU_00_Band0_R"].get_value()
+ return self._RCU_00_Band0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band0_R_read
+
+ def read_RCU_00_Band0_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band0_RW_read) ENABLED START #
+ """Return the RCU_00_Band0_RW attribute."""
+ self._RCU_00_Band0_RW = self.attribute_mapping["_RCU_00_Band0_RW"].get_value()
+ return self._RCU_00_Band0_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band0_RW_read
+
+ def write_RCU_00_Band0_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band0_RW_write) ENABLED START #
+ """Set the RCU_00_Band0_RW attribute."""
+ self.attribute_mapping["_RCU_00_Band0_RW"].set_value(value)
+ self._RCU_00_Band0_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band0_RW_write
+
+ def read_RCU_00_Band1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band1_R_read) ENABLED START #
+ """Return the RCU_00_Band1_R attribute."""
+ self._RCU_00_Band1_R = self.attribute_mapping["_RCU_00_Band1_R"].get_value()
+ return self._RCU_00_Band1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band1_R_read
+
+ def read_RCU_00_Band1_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band1_RW_read) ENABLED START #
+ """Return the RCU_00_Band1_RW attribute."""
+ self._RCU_00_Band1_RW = self.attribute_mapping["_RCU_00_Band1_RW"].get_value()
+ return self._RCU_00_Band1_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band1_RW_read
+
+ def write_RCU_00_Band1_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band1_RW_write) ENABLED START #
+ """Set the RCU_00_Band1_RW attribute."""
+ self.attribute_mapping["_RCU_00_Band1_RW"].set_value(value)
+ self._RCU_00_Band1_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band1_RW_write
+
+ def read_RCU_00_Band2_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band2_R_read) ENABLED START #
+ """Return the RCU_00_Band2_R attribute."""
+ self._RCU_00_Band2_R = self.attribute_mapping["_RCU_00_Band2_R"].get_value()
+ return self._RCU_00_Band2_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band2_R_read
+
+ def read_RCU_00_Band2_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band2_RW_read) ENABLED START #
+ """Return the RCU_00_Band2_RW attribute."""
+ self._RCU_00_Band2_RW = self.attribute_mapping["_RCU_00_Band2_RW"].get_value()
+ return self._RCU_00_Band2_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band2_RW_read
+
+ def write_RCU_00_Band2_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_Band2_RW_write) ENABLED START #
+ """Set the RCU_00_Band2_RW attribute."""
+ self.attribute_mapping["_RCU_00_Band2_RW"].set_value(value)
+ self._RCU_00_Band2_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_Band2_RW_write
+
+ def read_RCU_00_LED0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED0_R_read) ENABLED START #
+ """Return the RCU_00_LED0_R attribute."""
+ self._RCU_00_LED0_R = self.attribute_mapping["_RCU_00_LED0_R"].get_value()
+ return self._RCU_00_LED0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED0_R_read
+
+ def read_RCU_00_LED0_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED0_RW_read) ENABLED START #
+ """Return the RCU_00_LED0_RW attribute."""
+ self._RCU_00_LED0_RW = self.attribute_mapping["_RCU_00_LED0_RW"].get_value()
+ return self._RCU_00_LED0_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED0_RW_read
+
+ def write_RCU_00_LED0_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED0_RW_write) ENABLED START #
+ """Set the RCU_00_LED0_RW attribute."""
+ self.attribute_mapping["_RCU_00_LED0_RW"].set_value(value)
+ self._RCU_00_LED0_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED0_RW_write
+
+ def read_RCU_00_LED1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED1_R_read) ENABLED START #
+ """Return the RCU_00_LED1_R attribute."""
+ self._RCU_00_LED1_R = self.attribute_mapping["_RCU_00_LED1_R"].get_value()
+ return self._RCU_00_LED1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED1_R_read
+
+ def read_RCU_00_LED1_RW(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED1_RW_read) ENABLED START #
+ """Return the RCU_00_LED1_RW attribute."""
+ self._RCU_00_LED1_RW = self.attribute_mapping["_RCU_00_LED1_RW"].get_value()
+ return self._RCU_00_LED1_RW
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED1_RW_read
+
+ def write_RCU_00_LED1_RW(self, value):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_LED1_RW_write) ENABLED START #
+ """Set the RCU_00_LED1_RW attribute."""
+ self.attribute_mapping["_RCU_00_LED1_RW"].set_value(value)
+ self._RCU_00_LED1_RW = value
+ # PROTECTED REGION END # // RCUSCC.RCU_00_LED1_RW_write
+
+ def read_RCU_00_ADC_lock0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_ADC_lock0_R_read) ENABLED START #
+ """Return the RCU_00_ADC_lock0_R attribute."""
+ self._RCU_00_ADC_lock0_R = self.attribute_mapping["_RCU_00_ADC_lock0_R"].get_value()
+ return self._RCU_00_ADC_lock0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_ADC_lock0_R_read
+
+ def read_RCU_00_ADC_lock1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_ADC_lock1_R_read) ENABLED START #
+ """Return the RCU_00_ADC_lock1_R attribute."""
+ self._RCU_00_ADC_lock1_R = self.attribute_mapping["_RCU_00_ADC_lock1_R"].get_value()
+ return self._RCU_00_ADC_lock1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_ADC_lock1_R_read
+
+ def read_RCU_00_ADC_lock2_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_ADC_lock2_R_read) ENABLED START #
+ """Return the RCU_00_ADC_lock2_R attribute."""
+ self._RCU_00_ADC_lock2_R = self.attribute_mapping["_RCU_00_ADC_lock2_R"].get_value()
+ return self._RCU_00_ADC_lock2_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_ADC_lock2_R_read
+
+ def read_RCU_00_V_2v5_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_V_2v5_R_read) ENABLED START #
+ """Return the RCU_00_V_2v5_R attribute."""
+ self._RCU_00_V_2v5_R = self.attribute_mapping["_RCU_00_V_2v5_R"].get_value()
+ return self._RCU_00_V_2v5_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_V_2v5_R_read
+
+ def read_RCU_00_I_Ant0_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_I_Ant0_R_read) ENABLED START #
+ """Return the RCU_00_I_Ant0_R attribute."""
+ self._RCU_00_I_Ant0_R = self.attribute_mapping["_RCU_00_I_Ant0_R"].get_value()
+ return self._RCU_00_I_Ant0_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_I_Ant0_R_read
+
+ def read_RCU_00_I_Ant1_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_I_Ant1_R_read) ENABLED START #
+ """Return the RCU_00_I_Ant1_R attribute."""
+ self._RCU_00_I_Ant1_R = self.attribute_mapping["_RCU_00_I_Ant1_R"].get_value()
+ return self._RCU_00_I_Ant1_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_I_Ant1_R_read
+
+ def read_RCU_00_I_Ant2_R(self):
+ # PROTECTED REGION ID(RCUSCC.RCU_00_I_Ant2_R_read) ENABLED START #
+ """Return the RCU_00_I_Ant2_R attribute."""
+ self._RCU_00_I_Ant2_R = self.attribute_mapping["_RCU_00_I_Ant2_R"].get_value()
+ return self._RCU_00_I_Ant2_R
+ # PROTECTED REGION END # // RCUSCC.RCU_00_I_Ant2_R_read
+
# --------
# Commands
# --------