From 7d381fc0798ea62fb48a0c1bfa0193dee9d0f5b8 Mon Sep 17 00:00:00 2001 From: Jan David Mol <mol@astron.nl> Date: Fri, 29 Oct 2021 10:30:46 +0200 Subject: [PATCH] L2SS-394: Add hint to set_defaults to reset SST/XST configuration --- docs/source/faq.rst | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/docs/source/faq.rst b/docs/source/faq.rst index 8e35fceab..1ed4fceac 100644 --- a/docs/source/faq.rst +++ b/docs/source/faq.rst @@ -66,7 +66,9 @@ SSTs/XSTs Some SSTs/XSTs packets do arrive, but not all, and/or the matrices remain zero? `````````````````````````````````````````````````````````````````````````````````````````````````````````````` -So ``sst.nof_packets_received`` / ``xst.nof_packets_received`` is increasing, telling you packets are arriving. But they're apparently dropped or contain zeroes. First, check the following settings: +So ``sst.nof_packets_received`` / ``xst.nof_packets_received`` is increasing, telling you packets are arriving. But they're apparently dropped or contain zeroes. + +The ``sdp.set_defaults()`` command, followed by ``sst.set_defaults()`` / ``xst.set_defaults()``, should reset that device to its default settings, which should result in a working system again. If not, or if the default configuration is not correct, check the following settings: - ``sdp.TR_fpga_mask_RW[x] == True``, to make sure we're actually configuring the FPGAs, - ``sdp.FPGA_wg_enable_RW[x] == False``, or the Waveform Generator might be replacing our the antenna data with zeroes, @@ -84,7 +86,7 @@ I am not receiving any XSTs and/or SSTs packets from SDP! Are you sure? If ``sst.nof_packets_received`` / ``xst.nof_packets_received`` is actually increasing, the packets are arriving, but are not parsable by the SST/XST device. If so, see the previous question. -Many settings need to be correct for the statistics emitted by the SDP FPGAs to reach our devices correctly. Here is a brief overview: +The ``sdp.set_defaults()`` command, followed by ``sst.set_defaults()`` / ``xst.set_defaults()``, should reset that device to its default settings, which should result in a working system again. If not, or if the default configuration is not correct, check the following settings: - ``sdp.TR_fpga_mask_RW[x] == True``, to make sure we're actually configuring the FPGAs, - ``sdp.FPGA_communication_error_R[x] == False``, to verify the FPGAs can be reached by SDP, -- GitLab