From 68ee9fa924a7aadb7121755c2b63833c02178b18 Mon Sep 17 00:00:00 2001
From: Jan David Mol <mol@astron.nl>
Date: Tue, 18 Oct 2022 16:15:41 +0200
Subject: [PATCH] L2SS-1008: Moved mandatory SDP source address settings to
 LOFAR_ConfigDb, and changed them to the FPGA defaults that we used to use

---
 CDB/LOFAR_ConfigDb.json               | 54 +++++++++++++++++++++++++++
 CDB/stations/simulators_ConfigDb.json | 54 ---------------------------
 2 files changed, 54 insertions(+), 54 deletions(-)

diff --git a/CDB/LOFAR_ConfigDb.json b/CDB/LOFAR_ConfigDb.json
index dcf8ce83a..21783de7f 100644
--- a/CDB/LOFAR_ConfigDb.json
+++ b/CDB/LOFAR_ConfigDb.json
@@ -204,6 +204,60 @@
                 "SDP": {
                     "STAT/SDP/1": {
                         "properties": {
+                            "FPGA_beamlet_output_hdr_eth_source_mac_RW_default": [
+                                "00:22:86:08:00:00",
+                                "00:22:86:08:00:01",
+                                "00:22:86:08:00:02",
+                                "00:22:86:08:00:03",
+                                "00:22:86:08:01:00",
+                                "00:22:86:08:01:01",
+                                "00:22:86:08:01:02",
+                                "00:22:86:08:01:03",
+                                "00:22:86:08:02:00",
+                                "00:22:86:08:02:01",
+                                "00:22:86:08:02:02",
+                                "00:22:86:08:02:03",
+                                "00:22:86:08:03:00",
+                                "00:22:86:08:03:01",
+                                "00:22:86:08:03:02",
+                                "00:22:86:08:03:03"
+                            ],
+                            "FPGA_beamlet_output_hdr_ip_source_address_RW_default": [
+                                "192.168.0.1",
+                                "192.168.0.2",
+                                "192.168.0.3",
+                                "192.168.0.4",
+                                "192.168.1.1",
+                                "192.168.1.2",
+                                "192.168.1.3",
+                                "192.168.1.4",
+                                "192.168.2.1",
+                                "192.168.2.2",
+                                "192.168.2.3",
+                                "192.168.2.4",
+                                "192.168.3.1",
+                                "192.168.3.2",
+                                "192.168.3.3",
+                                "192.168.3.4"
+                            ],
+                            "FPGA_beamlet_output_hdr_udp_source_port_RW_default": [
+                                "53248",
+                                "53249",
+                                "53250",
+                                "53251",
+                                "53252",
+                                "53253",
+                                "53254",
+                                "53255",
+                                "53256",
+                                "53257",
+                                "53258",
+                                "53259",
+                                "53260",
+                                "53261",
+                                "53262",
+                                "53263"
+                            ]
                         }
                     }
                 }
diff --git a/CDB/stations/simulators_ConfigDb.json b/CDB/stations/simulators_ConfigDb.json
index f67bac703..51ea37683 100644
--- a/CDB/stations/simulators_ConfigDb.json
+++ b/CDB/stations/simulators_ConfigDb.json
@@ -84,60 +84,6 @@
                             "OPC_Time_Out": [
                                 "5.0"
                             ],
-                            "FPGA_beamlet_output_hdr_eth_source_mac_RW_default": [
-                                "00:11:22:33:44:00",
-                                "00:11:22:33:44:01",
-                                "00:11:22:33:44:02",
-                                "00:11:22:33:44:03",
-                                "00:11:22:33:44:04",
-                                "00:11:22:33:44:05",
-                                "00:11:22:33:44:06",
-                                "00:11:22:33:44:07",
-                                "00:11:22:33:44:08",
-                                "00:11:22:33:44:09",
-                                "00:11:22:33:44:10",
-                                "00:11:22:33:44:11",
-                                "00:11:22:33:44:12",
-                                "00:11:22:33:44:13",
-                                "00:11:22:33:44:14",
-                                "00:11:22:33:44:15"
-                            ],
-                            "FPGA_beamlet_output_hdr_ip_source_address_RW_default": [
-                                "10.0.0.0",
-                                "10.0.0.1",
-                                "10.0.0.2",
-                                "10.0.0.3",
-                                "10.0.0.4",
-                                "10.0.0.5",
-                                "10.0.0.6",
-                                "10.0.0.7",
-                                "10.0.0.8",
-                                "10.0.0.9",
-                                "10.0.0.10",
-                                "10.0.0.11",
-                                "10.0.0.12",
-                                "10.0.0.13",
-                                "10.0.0.14",
-                                "10.0.0.15"
-                            ],
-                            "FPGA_beamlet_output_hdr_udp_source_port_RW_default": [
-                                "4346",
-                                "4347",
-                                "4348",
-                                "4349",
-                                "4350",
-                                "4351",
-                                "4352",
-                                "4353",
-                                "4354",
-                                "4355",
-                                "4356",
-                                "4357",
-                                "4358",
-                                "4359",
-                                "4360",
-                                "4361"
-                            ],
                             "FPGA_beamlet_output_hdr_eth_destination_mac_RW_default": [
                                 "01:23:45:67:89:AB",
                                 "01:23:45:67:89:AB",
-- 
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