From 1f0cc10e13252ad02031d479564dbc7cf3699e1c Mon Sep 17 00:00:00 2001
From: thijs snijder <snijder@astron.nl>
Date: Thu, 22 Apr 2021 17:00:24 +0200
Subject: [PATCH] fixed missing PCC/APSCTL import
---
devices/APSCTL.py | 14 ++++++--------
devices/PCC.py | 3 +++
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/devices/APSCTL.py b/devices/APSCTL.py
index 6033d2e19..e4c4dd38e 100644
--- a/devices/APSCTL.py
+++ b/devices/APSCTL.py
@@ -14,11 +14,12 @@
# PyTango imports
from tango.server import run
from tango.server import device_property
+from tango import AttrWriteType
#attribute extention and hardware device imports
-from src.attribute_wrapper import *
-from src.hardware_device import *
-
+from src.attribute_wrapper import attribute_wrapper
+from src.hardware_device import hardware_device
+import numpy
# Additional import
from clients.opcua_connection import OPCUAConnection
@@ -99,7 +100,7 @@ class APSCTL(hardware_device):
# monitor points per FPGA
UNB2_FPGA_DDR4_SLOT_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
- UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R"], datatype=numpy.str, dims=(N_unb,N_fpga))
+ UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_DDR4_SLOT_PART_NUMBER_R"], datatype=numpy.str, dims=(N_unb * N_qsfp,N_fpga))
UNB2_FPGA_QSFP_CAGE_0_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_0_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_QSFP_CAGE_1_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_1_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_QSFP_CAGE_2_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_QSFP_CAGE_2_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
@@ -123,10 +124,7 @@ class APSCTL(hardware_device):
UNB2_FPGA_POL_RXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_RXGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_TXGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_TXGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
- # listed as 'POL_FPGA_TXGXB_TEMP_R' on https://support.astron.nl/confluence/pages/viewpage.action?spaceKey=L2M&title=L4+SDPHW+Decision%3A+UniBoard2+Monitor+and+Control+points
- # probably a typo
- POL_FPGA_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:POL_FPGA_TXGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
-
+ UNB2_FPGA_POL_TXGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:PCC", "2:UNB2_FPGA_POL_TXGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_HGXB_VOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_VOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_HGXB_IOUT_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_IOUT_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
UNB2_FPGA_POL_HGXB_TEMP_R = attribute_wrapper(comms_annotation=["2:UNB2_FPGA_POL_HGXB_TEMP_R"], datatype=numpy.double, dims=(N_unb,N_fpga))
diff --git a/devices/PCC.py b/devices/PCC.py
index 79b8a8228..96ef1013f 100644
--- a/devices/PCC.py
+++ b/devices/PCC.py
@@ -16,8 +16,11 @@ from tango import DebugIt
from tango.server import run, command
from tango.server import device_property
from tango import AttrWriteType
+import numpy
# Additional import
+from src.wrappers import *
+
from clients.opcua_connection import OPCUAConnection
from src.attribute_wrapper import attribute_wrapper
from src.hardware_device import hardware_device
--
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