diff --git a/CDB/stations/LTS_ConfigDb.json b/CDB/stations/LTS_ConfigDb.json index db50faad40440b5bf19b3034769f6997c87f2c69..7eee7db377db558814ca6ccdf56fb5108ada2293 100644 --- a/CDB/stations/LTS_ConfigDb.json +++ b/CDB/stations/LTS_ConfigDb.json @@ -158,24 +158,6 @@ "10.99.250.250", "10.99.250.250", "10.99.250.250" - ], - "FPGA_sst_offload_hdr_udp_destination_port_RW_default": [ - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001", - "5001" ] } } @@ -237,24 +219,6 @@ "10.99.250.250", "10.99.250.250", "10.99.250.250" - ], - "FPGA_xst_offload_hdr_udp_destination_port_RW_default": [ - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002", - "5002" ] } } diff --git a/CDB/stations/simulators_configDb.json b/CDB/stations/simulators_configDb.json index a1dbb2a690cd86186954bba2d106b3afe0d3f04d..7d246bdd6cbc80b7f0cc3e21110265fdc4bbd81a 100644 --- a/CDB/stations/simulators_configDb.json +++ b/CDB/stations/simulators_configDb.json @@ -89,6 +89,42 @@ ], "OPC_Time_Out": [ "5.0" + ], + "FPGA_sst_offload_hdr_eth_destination_mac_RW_default": [ + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB" + ], + "FPGA_sst_offload_hdr_ip_destination_address_RW_default": [ + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1" ] } } @@ -108,6 +144,42 @@ ], "OPC_Time_Out": [ "5.0" + ], + "FPGA_xst_offload_hdr_eth_destination_mac_RW_default": [ + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB", + "01:23:45:67:89:AB" + ], + "FPGA_xst_offload_hdr_ip_destination_address_RW_default": [ + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1", + "127.0.0.1" ] } } diff --git a/devices/devices/sdp/sdp.py b/devices/devices/sdp/sdp.py index 9dc847db58bfa8a47aad3373eae0a19e81ccf36b..632451bba99a13e62e4fa19dc7b3aba259949225 100644 --- a/devices/devices/sdp/sdp.py +++ b/devices/devices/sdp/sdp.py @@ -80,7 +80,8 @@ class SDP(opcua_device): FPGA_sdp_info_station_id_RW_default = device_property( dtype='DevVarULongArray', - mandatory=True + mandatory=False, + default_value=[0] * 16 ) FPGA_subband_weights_RW_default = device_property(