diff --git a/src/board.cpp b/src/board.cpp index 5a449356201e7a42ba8a69d1bf3508a6e145b11f..2d65366cd393528a7dc1aae87a18920736350fe5 100644 --- a/src/board.cpp +++ b/src/board.cpp @@ -66,24 +66,11 @@ Node * Board::select_node(const int nr) throw runtime_error("select_node: not found"); } -void Board::print_node_id(ostringstream& strs, Node *node) -{ - strs << "/unb" << node->GetUniboardNr() << "/" << node->GetType() - << node->GetLocalNr() << "/" << endl; -} - uint Board::node_number(Node *node) { return (node->GetUniboardNr() * 4) + node->GetLocalNr(); } -string Board::string_node_id(int node) -{ - auto n = select_node(node); - return "/unb" + to_string(n->GetUniboardNr()) + "/" + n->GetType() + - to_string(n->GetLocalNr()) + "/"; -} - vector<int> Board::get_nodes(void) { vector<int> nodes; @@ -115,25 +102,6 @@ bool Board::monitor(TermOutput& termout) return retval; } -/* - * input: - * unb=uniboard vector - * pn=node vector 0..3 - * - * output: - * nodes=vector - */ -vector<int> Board::unb_pn__to__nodes(vector<int> unbs, vector<int> pns) -{ - vector<int> nodes; - for (auto unb : unbs) { - for (auto pn : pns) { - nodes.push_back(pn + (c_NOF_PN_on_UNB * unb)); - } - } - return nodes; -} - uint Board::ipaddr_to_id(const string ipaddr) { struct in_addr sa; @@ -151,214 +119,3 @@ uint Board::ipaddr_to_id(const string ipaddr) uint8_t unb = (uint8_t)(ip >> 8); // unb number is stored in 2nd least significant tuble return (unb * 8 + node); } - -vector<int> Board::unb_name_to_number(const string unb_name) -{ - vector<int> unbs; - - //cout << "Board::unb_name_to_number: unb_name=" << unb_name << endl; - - if (unb_name.length() > strlen("unb")) { - - if (unb_name.compare(0, 3, "unb") == 0) { - string unb_range = unb_name.substr(3); - - try { - unbs.push_back(stoi(unb_range, nullptr)); - } catch (const invalid_argument& ia) { - //cerr << "Board::unb_name_to_number: Invalid argument: " - // << ia.what() << " - but trying vector..." << endl; - istringstream vecstr(unb_range); - unbs = parse_int_vector_range(vecstr); - } - } - } - return unbs; -} - -vector<int> Board::pn_name_to_number(const string pn_name) -{ - vector<int> pns; - - if (pn_name.length() > strlen("pn")) { - if (pn_name.compare(0, 2, "pn") == 0) { - string pn_range = pn_name.substr(2); - try { - pns.push_back(stoi(pn_range,nullptr)); - } catch (const invalid_argument& ia) { - //cerr << "Board::pn_name_to_number: Invalid argument: " - // << ia.what() << " - but trying vector..." << endl; - istringstream vecstr(pn_range); - pns = parse_int_vector_range(vecstr); - } - } - } - return pns; -} - -bool Board::is_unb_node(const string addr) -{ - bool retval = false; - vector<int> nodes = path_to_node(addr); - - if (nodes.size() > 0) { - retval = true; - } - return retval; -} - -bool Board::is_gn(const string addr_name) -{ - if (addr_name.length() > strlen("gn")) { - if (addr_name.compare(0, 2, "gn") == 0) { - return true; - } - } - return false; -} - -vector<int> Board::gn_name_to_number(const string gn_name) -{ - vector<int> gns; - - if (is_gn(gn_name)) { - string gn_range = gn_name.substr(2); - try { - gns.push_back(stoi(gn_range, nullptr)); - } catch (const invalid_argument& ia) { - istringstream vecstr(gn_range); - gns = parse_int_vector_range(vecstr); - } - } - return gns; -} - -// "/unb0/pn3/mm/instance" or "/gn0/mm/instance" -// 0 1 2 3 4 0 1 2 3 -#define c_PATH_root 0 -#define c_PATH_unb 1 -#define c_PATH_gn 1 -#define c_PATH_pn 2 -#define c_PATH_type 3 -#define c_PATH_inst 4 - -vector<int> Board::path_to_node(string path_str) -{ - vector<int> nodes; - stringstream strs(path_str); - string token; - vector<string> tokens; - - while (getline(strs, token, '/')) { - tokens.push_back(token); - } - if (tokens.size() > c_PATH_pn) { - if (tokens[c_PATH_root] == "") { - // ok, is absolute path starting with '/' - vector<int> unb = unb_name_to_number(tokens[c_PATH_unb]); - vector<int> pn = pn_name_to_number(tokens[c_PATH_pn]); - - if (unb.size() == 0 && pn.size() == 0) { - vector<int> gn = gn_name_to_number(tokens[c_PATH_gn]); - for (auto g : gn) { - if (g >= 0) { - nodes.push_back(g); - } - } - } - else { - for (auto u : unb) { - for (auto p : pn) { - if (u >= 0 && p >= 0) { - nodes.push_back(p + (c_NOF_PN_on_UNB * u)); - } - } - } - } - } - } -//cout << "Board::path_to_node found: "; -// for (auto n : nodes) { -//cout << n << ","; -// } -//cout << endl; - return nodes; -} - -string Board::addr_to_relative_addr(string addr) -{ - string rel_addr; - stringstream strs(addr); - string token; - vector<string> tokens; - uint first_delimitor = c_PATH_type; - - while (getline(strs, token, '/')) { - tokens.push_back(token); - } - - if (tokens.size() > c_PATH_pn) { - if (is_gn(tokens[c_PATH_gn])) { - first_delimitor = c_PATH_type - 1; - } - } - - for (uint i=first_delimitor; i<tokens.size(); i++) { - if (i > first_delimitor) { - rel_addr += "/"; - } - rel_addr += tokens[i]; - } -//cout << "Board::addr_to_relative_addr[" << addr << "]=" << rel_addr << endl; - return rel_addr; -} - -string Board::addr_to_type(string addr) -{ - string type; - stringstream strs(addr); - string token; - vector<string> tokens; - uint first_delimitor = c_PATH_type; - - while (getline(strs, token, '/')) { - tokens.push_back(token); - } - - if (tokens.size() > c_PATH_pn) { - if (is_gn(tokens[c_PATH_gn])) { - first_delimitor = c_PATH_type - 1; - } - } - - if (tokens.size() > first_delimitor) { - type = tokens[first_delimitor]; - } -//cout << "Board::addr_to_type[" << addr << "]=" << type << endl; - return type; -} - -string Board::addr_to_instance(string addr) -{ - string instance; - stringstream strs(addr); - string token; - vector<string> tokens; - uint first_delimitor = c_PATH_inst; - - while (getline(strs, token, '/')) { - tokens.push_back(token); - } - - if (tokens.size() > c_PATH_pn) { - if (is_gn(tokens[c_PATH_gn])) { - first_delimitor = c_PATH_inst - 1; - } - } - - if (tokens.size() > first_delimitor) { - instance = tokens[first_delimitor]; - } -//cout << "Board::addr_to_instance[" << addr << "]=" << instance << endl; - return instance; -} diff --git a/src/board.h b/src/board.h index e8caec456fcb9b02ad252da906b5b2e4e1952611..b3cdd639e55d3a902154d1efd7c608a7d48847f0 100644 --- a/src/board.h +++ b/src/board.h @@ -49,37 +49,16 @@ private: std::list<class Node*> NODE; Node * select_node(const int nodeId); - void print_node_id(std::ostringstream& strs, Node *node); uint node_number(Node *node); - public: Board(std::list<class Node*>& nodelist); ~Board(); - // bool execute(TermOutput& termout, const char cmd, const std::string addr, - // const unsigned int *data, const int len); - std::vector<int> get_nodes(void); bool monitor(TermOutput& termout); - std::vector<int> unb_pn__to__nodes(std::vector<int> unbs, std::vector<int> pns); - uint ipaddr_to_id(const std::string ipaddr); - - std::string string_node_id(int node); - - std::vector<int> path_to_node(std::string path_str); - std::vector<int> unb_name_to_number(const std::string unb_name); - std::vector<int> pn_name_to_number(const std::string pn_name); - std::vector<int> gn_name_to_number(const std::string gn_name); - - bool is_gn(const std::string addr_name); - bool is_unb_node(const std::string addr); - - std::string addr_to_relative_addr(std::string addr); - std::string addr_to_instance(std::string addr); - std::string addr_to_type(std::string addr); }; #endif diff --git a/src/constants.h b/src/constants.h index 2d7dad1a04a84a6330b4cfad03ef732d5cf59e14..58109e36bb28aa3cfc1650ce86b15421d50e4a6d 100644 --- a/src/constants.h +++ b/src/constants.h @@ -31,7 +31,6 @@ #define FPGAS_PER_BOARD 4 -#define C_N_pn 16 #define C_S_pn 12 #define C_W_adc 14 #define C_F_adc 200E6 @@ -46,7 +45,6 @@ #define C_Q_fft 2 #define C_N_sub 512 -#define C_N_beamsets 2 #define C_N_step 1 #define C_N_crosslets_max 7 #define C_N_scrap 512 // Number of 32 bit words in FPGA scrap memory. @@ -55,4 +53,5 @@ #define C_N_beamlets 976 // Number of beamlets per antenna band 488, 976 #define C_200MHZ_1_CNT_NS 5 // Time of one cnt in nS +#define C_N_CLK_PER_PPS 200000000 #endif diff --git a/src/fpga.cpp b/src/fpga.cpp index a13b650901ad4d0b9e1b6d73de4cfbc36c956e1a..515fe87a0d8c28266d42fb360802a49870a0aa01 100644 --- a/src/fpga.cpp +++ b/src/fpga.cpp @@ -46,9 +46,10 @@ using namespace std; extern int debug; -Fpga::Fpga(list<class Node*>& nodelist) +Fpga::Fpga(list<class Node*>& nodelist, const int32_t n_beam_sets): + n_beamsets(n_beam_sets), + FPGA(nodelist) { - FPGA = nodelist; pointMap = new CPointMap(); // Add points: @@ -69,16 +70,16 @@ Fpga::Fpga(list<class Node*>& nodelist) pointMap->add_register("FPGA_sst_offload_hdr_udp_destination_port_R", "fpga/sst_offload_hdr_udp_destination_port", nodes.size(), 1, "RO", REG_FORMAT_UINT16); pointMap->add_register("FPGA_sst_offload_hdr_udp_destination_port_RW", "fpga/sst_offload_hdr_udp_destination_port", nodes.size(), 1, "RW", REG_FORMAT_UINT16); - pointMap->add_register("FPGA_bst_offload_enable_R", "fpga/bst_offload_enable", nodes.size(), C_N_beamsets, "RO", REG_FORMAT_BOOLEAN); - pointMap->add_register("FPGA_bst_offload_enable_RW", "fpga/bst_offload_enable", nodes.size(), C_N_beamsets, "RW", REG_FORMAT_BOOLEAN); - pointMap->add_register("FPGA_bst_offload_hdr_eth_destination_mac_R", "fpga/bst_offload_hdr_eth_destination_mac", nodes.size(), C_N_beamsets, "RO", REG_FORMAT_STRING); - pointMap->add_register("FPGA_bst_offload_hdr_eth_destination_mac_RW", "fpga/bst_offload_hdr_eth_destination_mac", nodes.size(), C_N_beamsets, "RW", REG_FORMAT_STRING); - pointMap->add_register("FPGA_bst_offload_hdr_ip_destination_address_R", "fpga/bst_offload_hdr_ip_destination_address", nodes.size(), C_N_beamsets, "RO", REG_FORMAT_STRING); - pointMap->add_register("FPGA_bst_offload_hdr_ip_destination_address_RW", "fpga/bst_offload_hdr_ip_destination_address", nodes.size(), C_N_beamsets, "RW", REG_FORMAT_STRING); - pointMap->add_register("FPGA_bst_offload_hdr_udp_destination_port_R", "fpga/bst_offload_hdr_udp_destination_port", nodes.size(), C_N_beamsets, "RO", REG_FORMAT_UINT16); - pointMap->add_register("FPGA_bst_offload_hdr_udp_destination_port_RW", "fpga/bst_offload_hdr_udp_destination_port", nodes.size(), C_N_beamsets, "RW", REG_FORMAT_UINT16); - // pointMap->add_register("FPGA_bst_offload_nof_beamlets_per_packet_R", "fpga/bst_offload_nof_beamlets_per_packet", nodes.size(), C_N_beamsets, "RO", REG_FORMAT_UINT32); - // pointMap->add_register("FPGA_bst_offload_nof_beamlets_per_packet_RW", "fpga/bst_offload_nof_beamlets_per_packet", nodes.size(), C_N_beamsets, "RW", REG_FORMAT_UINT32); + pointMap->add_register("FPGA_bst_offload_enable_R", "fpga/bst_offload_enable", nodes.size(), n_beamsets, "RO", REG_FORMAT_BOOLEAN); + pointMap->add_register("FPGA_bst_offload_enable_RW", "fpga/bst_offload_enable", nodes.size(), n_beamsets, "RW", REG_FORMAT_BOOLEAN); + pointMap->add_register("FPGA_bst_offload_hdr_eth_destination_mac_R", "fpga/bst_offload_hdr_eth_destination_mac", nodes.size(), n_beamsets, "RO", REG_FORMAT_STRING); + pointMap->add_register("FPGA_bst_offload_hdr_eth_destination_mac_RW", "fpga/bst_offload_hdr_eth_destination_mac", nodes.size(), n_beamsets, "RW", REG_FORMAT_STRING); + pointMap->add_register("FPGA_bst_offload_hdr_ip_destination_address_R", "fpga/bst_offload_hdr_ip_destination_address", nodes.size(), n_beamsets, "RO", REG_FORMAT_STRING); + pointMap->add_register("FPGA_bst_offload_hdr_ip_destination_address_RW", "fpga/bst_offload_hdr_ip_destination_address", nodes.size(), n_beamsets, "RW", REG_FORMAT_STRING); + pointMap->add_register("FPGA_bst_offload_hdr_udp_destination_port_R", "fpga/bst_offload_hdr_udp_destination_port", nodes.size(), n_beamsets, "RO", REG_FORMAT_UINT16); + pointMap->add_register("FPGA_bst_offload_hdr_udp_destination_port_RW", "fpga/bst_offload_hdr_udp_destination_port", nodes.size(), n_beamsets, "RW", REG_FORMAT_UINT16); + // pointMap->add_register("FPGA_bst_offload_nof_beamlets_per_packet_R", "fpga/bst_offload_nof_beamlets_per_packet", nodes.size(), n_beamsets, "RO", REG_FORMAT_UINT32); + // pointMap->add_register("FPGA_bst_offload_nof_beamlets_per_packet_RW", "fpga/bst_offload_nof_beamlets_per_packet", nodes.size(), n_beamsets, "RW", REG_FORMAT_UINT32); pointMap->add_register("FPGA_xst_subband_select_R", "fpga/xst_subband_select", nodes.size(), 1+C_N_crosslets_max, "RO", REG_FORMAT_UINT32); pointMap->add_register("FPGA_xst_subband_select_RW", "fpga/xst_subband_select", nodes.size(), 1+C_N_crosslets_max, "RW", REG_FORMAT_UINT32); @@ -127,6 +128,8 @@ Fpga::Fpga(list<class Node*>& nodelist) pointMap->add_register("FPGA_jesd204b_rx_err0_R", "fpga/jesd204b_rx_err0", nodes.size(), C_S_pn, "RO", REG_FORMAT_UINT32); pointMap->add_register("FPGA_jesd204b_rx_err1_R", "fpga/jesd204b_rx_err1", nodes.size(), C_S_pn, "RO", REG_FORMAT_UINT32); + pointMap->add_register("FPGA_signal_input_mean_R", "fpga/signal_input_mean", nodes.size(), C_S_pn, "RO", REG_FORMAT_DOUBLE); + pointMap->add_register("FPGA_signal_input_rms_R", "fpga/signal_input_rms", nodes.size(), C_S_pn, "RO", REG_FORMAT_DOUBLE); pointMap->add_register("FPGA_signal_input_samples_delay_R", "fpga/signal_input_samples_delay", nodes.size(), C_S_pn, "RO", REG_FORMAT_UINT32); pointMap->add_register("FPGA_signal_input_samples_delay_RW", "fpga/signal_input_samples_delay", nodes.size(), C_S_pn, "RW", REG_FORMAT_UINT32); @@ -136,8 +139,8 @@ Fpga::Fpga(list<class Node*>& nodelist) pointMap->add_register("FPGA_scrap_R", "fpga/scrap", nodes.size(), C_N_scrap, "RO", REG_FORMAT_UINT32); pointMap->add_register("FPGA_scrap_RW", "fpga/scrap", nodes.size(), C_N_scrap, "RW", REG_FORMAT_UINT32); - pointMap->add_register("FPGA_weights_R", "fpga/weights", nodes.size(), C_S_pn*C_N_beamlets, "RO", REG_FORMAT_INT16); - pointMap->add_register("FPGA_weights_RW", "fpga/weights", nodes.size(), C_S_pn*C_N_beamlets, "RW", REG_FORMAT_INT16); + pointMap->add_register("FPGA_weights_R", "fpga/weights", nodes.size(), C_S_pn*n_beamsets, "RO", REG_FORMAT_INT16); + pointMap->add_register("FPGA_weights_RW", "fpga/weights", nodes.size(), C_S_pn*n_beamsets, "RW", REG_FORMAT_INT16); } Fpga::~Fpga() diff --git a/src/fpga.h b/src/fpga.h index 5bbd57c057aadc1dbc3d64576d57429ae9fe920e..f66204197e98ea340a900908467a1fd6826c5e13 100644 --- a/src/fpga.h +++ b/src/fpga.h @@ -41,11 +41,12 @@ class Fpga { private: + int32_t n_beamsets; std::list<class Node*> FPGA; CPointMap *pointMap; public: - Fpga(std::list<class Node*>& nodelist); + Fpga(std::list<class Node*>& nodelist, const int32_t n_beam_sets); ~Fpga(); bool point(TermOutput& termout, const char cmd, const std::string addr, diff --git a/src/map.cpp b/src/map.cpp index ad1ec61ede5cab494bab72a401fc987f5eeb3f78..3683a9d804f9a8b7d552aba9c44b245f3e780e1b 100644 --- a/src/map.cpp +++ b/src/map.cpp @@ -34,7 +34,7 @@ using namespace std; extern int debug; -UniboardMap::UniboardMap(list<class Node*>& nodelist) : Board(nodelist), Fpga(nodelist) +UniboardMap::UniboardMap(list<class Node*>& nodelist, const int32_t n_beamsets) : Board(nodelist), Fpga(nodelist, n_beamsets) { initialized = false; } diff --git a/src/map.h b/src/map.h index b2d021a928fd72ae7c2924e3d4fec81d58d4f058..af93f0eaa248de4a5913ddaddcf660063196a370 100644 --- a/src/map.h +++ b/src/map.h @@ -47,7 +47,7 @@ private: public: -UniboardMap(std::list<class Node*>& nodelist); +UniboardMap(std::list<class Node*>& nodelist, const int32_t n_beamsets); ~UniboardMap() {}; bool is_initialized(void) { return initialized; } diff --git a/src/node.cpp b/src/node.cpp index 9bcda75ac1293d19d8171c98a5ce12e6d4c71de7..a953c71aaabe7808159781d315f9b178ec82a063 100644 --- a/src/node.cpp +++ b/src/node.cpp @@ -150,16 +150,14 @@ void Node::worker() // << " leaving!!" << endl; } -Node::Node(const string ipaddr, const uint unb, const uint localnr, const string type) +Node::Node(const string ipaddr, const uint unb, const uint localnr, const string type, const uint n_beamsets): + myIPaddr(ipaddr), + UniboardNr(unb), + LocalNr(localnr), + GlobalNr(localnr + 4 * unb), + nBeamsets(n_beamsets) { - // int ret; - UniboardNr = unb; - LocalNr = localnr; - GlobalNr = localnr + 4 * unb; - - myIPaddr = ipaddr; - periph_fpga = new Periph_fpga(GlobalNr, ipaddr); - + periph_fpga = new Periph_fpga(GlobalNr, ipaddr, n_beamsets); if (type != "pn") { throw runtime_error("invalid node type: \"" + type + "\""); diff --git a/src/node.h b/src/node.h index b186ba8fa1dc8def85a19511f43e03379c43652a..d5c969f1d7d40e16bd4b7b4eb8d469cc61986a91 100644 --- a/src/node.h +++ b/src/node.h @@ -99,8 +99,9 @@ class Node { private: std::string myIPaddr; uint UniboardNr; - uint GlobalNr; uint LocalNr; + uint GlobalNr; + uint nBeamsets; std::string Type; std::thread *worker_thread; @@ -115,7 +116,7 @@ class Node { } public: - Node(const std::string ipaddr, const uint unb, const uint localnr, const std::string type); + Node(const std::string ipaddr, const uint unb, const uint localnr, const std::string type, const uint n_beamsets); ~Node(); uint ipaddr_to_id(const std::string ipaddr); diff --git a/src/periph/fpga.cpp b/src/periph/fpga.cpp index 05e54116095b4dfb75ab32df463db6346e532865..f5619654fd044a2c81f5914df4dad64cd1f8a758 100644 --- a/src/periph/fpga.cpp +++ b/src/periph/fpga.cpp @@ -58,8 +58,9 @@ extern int debug; #define R_MEM 0 // read mem value #define R_UCP 1 // read value from hardware -Periph_fpga::Periph_fpga(uint global_nr, string ipaddr): +Periph_fpga::Periph_fpga(uint global_nr, string ipaddr, uint n_beamsets): GlobalNr(global_nr), + nBeamsets(n_beamsets), Masked(false), Online(false), my_current_design_name("-"), @@ -75,7 +76,9 @@ Periph_fpga::Periph_fpga(uint global_nr, string ipaddr): my_jesd_rx_err0 {0}, my_jesd_rx_err1 {0}, my_xst_processing_enable(false), - my_pps_offset_cnt(0) + my_pps_offset_cnt(0), + my_signal_input_mean {0.0}, + my_signal_input_rms {0.0} { ucp = new UCP(ipaddr); mmap = new CMMap(); @@ -287,6 +290,12 @@ bool Periph_fpga::read(TermOutput& termout, const string addr, else if (addr == "fpga/jesd204b_rx_err1") { retval = read_jesd204b_rx_err1(termout, format, R_MEM); } + else if (addr == "fpga/signal_input_mean") { + retval = read_signal_input_mean(termout, format, R_MEM); + } + else if (addr == "fpga/signal_input_rms") { + retval = read_signal_input_rms(termout, format, R_MEM); + } else if (addr == "fpga/signal_input_samples_delay") { retval = read_signal_input_samples_delay(termout, format); } @@ -480,6 +489,8 @@ bool Periph_fpga::monitor(TermOutput& termout) read_jesd204b_csr_dev_syncn(termout, REG_FORMAT_UINT32, R_UCP); read_jesd204b_rx_err0(termout, REG_FORMAT_UINT32, R_UCP); read_jesd204b_rx_err1(termout, REG_FORMAT_UINT32, R_UCP); + read_signal_input_mean(termout, REG_FORMAT_DOUBLE, R_UCP); + read_signal_input_rms(termout, REG_FORMAT_DOUBLE, R_UCP); } termout.clear(); tictoc.toc(); @@ -501,9 +512,6 @@ bool Periph_fpga::monitor(TermOutput& termout) bool Periph_fpga::Read(const string addr_str, uint32_t *data_ptr, bool use_mask_shift=true) { bool ret; - if (!Masked) { - return false; - } if (mmap->empty()) { return false; } @@ -537,10 +545,11 @@ bool Periph_fpga::Read(const string addr_str, uint32_t *data_ptr, bool use_mask_ */ bool Periph_fpga::Write(const string addr_str, uint32_t *data_ptr, bool use_shift_mask=true) { - if (!Masked) { + if (mmap->empty()) { return false; } if (!mmap->find_register(addr_str)) { + cout << addr_str << " not found" << endl; return false; } uint32_t addr = mmap->getValidAddr((addr_str), 1); @@ -654,7 +663,7 @@ bool Periph_fpga::read_system_info(TermOutput& termout) return false; } } - + // If the design name is changed clear the mmap. string design_name = read_design_name(); if (design_name != my_current_design_name) { @@ -1163,7 +1172,7 @@ bool Periph_fpga::read_bst_offload_enable(TermOutput& termout, int format) uint32_t data[20]; // bool select; bool *_ptr = (bool *)termout.val; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { memset((void *)data, 0, sizeof(data)); regname = "mm/" + to_string(i) + "/REG_STAT_ENABLE_BST/0/enable"; retval &= Read(regname, data); @@ -1172,7 +1181,7 @@ bool Periph_fpga::read_bst_offload_enable(TermOutput& termout, int format) *_ptr = select; _ptr++; } - termout.nof_vals = C_N_beamsets; + termout.nof_vals = nBeamsets; termout.datatype = format; return retval; } @@ -1183,7 +1192,7 @@ bool Periph_fpga::write_bst_offload_enable(const char *data) bool retval = true; string regname; uint32_t _data[1]; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { regname = "mm/" + to_string(i) + "/REG_STAT_ENABLE_BST/0/enable"; _data[0] = (uint32_t)_ptr[i]; retval &= Write(regname, _data); @@ -1201,7 +1210,7 @@ bool Periph_fpga::read_bst_offload_hdr_eth_destination_mac(TermOutput& termout, // uint64_t mac; stringstream mac_ss; string mac_str; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { memset((void *)data, 0, sizeof(data)); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/eth_destination_mac"; retval &= Read(regname, data); @@ -1219,7 +1228,7 @@ bool Periph_fpga::read_bst_offload_hdr_eth_destination_mac(TermOutput& termout, // cout << "bst_eth_destination_mac: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << mac_str << ", retval=" << retval << endl; strcpy(&(termout.val[i*SIZE1STRING]), mac_str.c_str()); } - termout.nof_vals = C_N_beamsets; + termout.nof_vals = nBeamsets; termout.datatype = format; return retval; } @@ -1234,11 +1243,12 @@ bool Periph_fpga::write_bst_offload_hdr_eth_destination_mac(const char *data) uint32_t mac[2] {0, 0}; string ds; stringstream ss; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { ss.clear(); ss.str(""); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/eth_destination_mac"; ds = &data[i*SIZE1STRING]; + cout << ds << endl; ss << ds; ss >> setbase(16) >> m0 >> sep >> m1 >> sep >> m2 >> sep >> m3 >> sep >> m4 >> sep >> m5; if (ss.fail() || ss.bad()) { @@ -1261,7 +1271,7 @@ bool Periph_fpga::read_bst_offload_hdr_ip_destination_address(TermOutput& termou uint32_t data[20]; stringstream ip_ss; string ip_str; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { memset((void *)data, 0, sizeof(data)); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/ip_destination_address"; retval &= Read(regname, data); @@ -1277,7 +1287,7 @@ bool Periph_fpga::read_bst_offload_hdr_ip_destination_address(TermOutput& termou // cout << "bst_ip_destination_address: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << ip_str << ", retval=" << retval << endl; strcpy(&termout.val[i*SIZE1STRING], ip_str.c_str()); } - termout.nof_vals = C_N_beamsets; + termout.nof_vals = nBeamsets; termout.datatype = format; return retval; } @@ -1291,12 +1301,13 @@ bool Periph_fpga::write_bst_offload_hdr_ip_destination_address(const char *data) uint32_t ip[1] = {0}; string ds; stringstream ss; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { ss.clear(); ss.str(""); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/ip_destination_address"; // cout << "write_ip=[" << ds << "]" << endl; ds = &data[i*SIZE1STRING]; + cout << ds << endl; ss << ds; ss >> setbase(10) >> ip0; ss >> sep; @@ -1330,7 +1341,7 @@ bool Periph_fpga::read_bst_offload_hdr_udp_destination_port(TermOutput& termout, uint32_t data[20]; // int port; uint16_t *_ptr = (uint16_t *)termout.val; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { memset((void *)data, 0, sizeof(data)); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/udp_destination_port"; retval &= Read(regname, data); @@ -1339,7 +1350,7 @@ bool Periph_fpga::read_bst_offload_hdr_udp_destination_port(TermOutput& termout, *_ptr = port; _ptr++; } - termout.nof_vals = C_N_beamsets; + termout.nof_vals = nBeamsets; termout.datatype = format; return retval; } @@ -1349,7 +1360,7 @@ bool Periph_fpga::write_bst_offload_hdr_udp_destination_port(const char *data) uint32_t *_ptr = (uint32_t *)data; bool retval = true; string regname; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/udp_destination_port"; retval &= Write(regname, &_ptr[i]); } @@ -1363,7 +1374,7 @@ bool Periph_fpga::read_bst_offload_nof_beamlets_per_packet(TermOutput& termout, uint32_t data[20]; int *_ptr = (int *)termout.val; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { memset((void *)data, 0, sizeof(data)); regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/TODO"; retval &= Read(regname, data); @@ -1371,7 +1382,7 @@ bool Periph_fpga::read_bst_offload_nof_beamlets_per_packet(TermOutput& termout, *_ptr = packets; _ptr++; } - termout.nof_vals = C_N_beamsets; + termout.nof_vals = nBeamsets; termout.datatype = format; return retval; } @@ -1381,7 +1392,7 @@ bool Periph_fpga::write_bst_offload_nof_beamlets_per_packet(const char *data) uint32_t *_ptr = (uint32_t *)data; bool retval = true; string regname; - for (uint32_t i=0; i<C_N_beamsets; i++) { + for (uint32_t i=0; i<nBeamsets; i++) { regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/TODO"; if (Write(regname, &_ptr[i]) == false) { retval = false; @@ -2305,6 +2316,57 @@ bool Periph_fpga::read_signal_input_samples_delay(TermOutput& termout, int forma return retval; } +bool Periph_fpga::read_signal_input_mean(TermOutput& termout, int format, int mode) { + bool retval = true; + if (mode == R_UCP) { + uint32_t data[2]; + memset((void *)data, 0, sizeof(data)); + string regname; + int64_t mean_sum; + for (uint i=0; i< C_S_pn; i++) { + regname = "mm/0/REG_ADUH_MONITOR/" + to_string(i) + "/mean_sum"; + retval = Read(regname, data); + mean_sum = (int64_t)(((int64_t)data[1] << 32) + data[0]); + my_signal_input_mean[i] = (double)mean_sum / C_N_CLK_PER_PPS; + } + } + + double *_ptr = (double *)termout.val; + for (uint i=0; i< C_S_pn; i++) { + *_ptr = my_signal_input_mean[i]; + _ptr++; + } + termout.nof_vals = C_S_pn; + termout.datatype = format; + return retval; +} + +bool Periph_fpga::read_signal_input_rms(TermOutput& termout, int format, int mode) { + bool retval = true; + if (mode == R_UCP) { + uint32_t data[2]; + memset((void *)data, 0, sizeof(data)); + string regname; + int64_t power_sum; + for (uint i=0; i< C_S_pn; i++) { + regname = "mm/0/REG_ADUH_MONITOR/" + to_string(i) + "/power_sum"; + retval = Read(regname, data); + power_sum = (int64_t)(((int64_t)data[1] << 32) + data[0]); + my_signal_input_rms[i] = sqrt((double)power_sum / C_N_CLK_PER_PPS); + } + } + + double *_ptr = (double *)termout.val; + for (uint i=0; i< C_S_pn; i++) { + *_ptr = my_signal_input_rms[i]; + _ptr++; + } + termout.nof_vals = C_S_pn; + termout.datatype = format; + return retval; +} + + bool Periph_fpga::write_subband_weights(const char *data) { uint32_t *_ptr = (uint32_t *)data; bool retval = true; diff --git a/src/periph/fpga.h b/src/periph/fpga.h index 443273622d6f44e66d5e37fdf800e916cb600500..3419809fdae938a6d684be3fac6d3ff371745273 100644 --- a/src/periph/fpga.h +++ b/src/periph/fpga.h @@ -47,6 +47,7 @@ private: UCP *ucp; CMMap *mmap; uint32_t GlobalNr; + uint32_t nBeamsets; // Masked is set by the client and is used to set the fpga's to communinicate with, true is communicate, false do not. bool Masked; @@ -71,12 +72,8 @@ private: bool my_xst_processing_enable; uint32_t my_pps_offset_cnt; - uint32_t fw_version_mask; - uint32_t fw_version_shift; - uint32_t fw_subversion_mask; - uint32_t fw_subversion_shift; - uint32_t hw_version_mask; - uint32_t hw_version_shift; + double my_signal_input_mean[C_S_pn]; + double my_signal_input_rms[C_S_pn]; std::ofstream rbf_wf; uint32_t Flash_page_start, Flash_page_size_bytes, Flash_user_sector_start, @@ -182,6 +179,8 @@ private: bool write_signal_input_samples_delay(const char *data); bool read_signal_input_samples_delay(TermOutput& termout, int format); + bool read_signal_input_mean(TermOutput& termout, int format, int mode); + bool read_signal_input_rms(TermOutput& termout, int format, int mode); bool write_subband_weights(const char *data); bool read_subband_weights(TermOutput& termout, int format); @@ -194,7 +193,7 @@ private: CMMap read_reg_map(); public: - Periph_fpga(uint global_nr, std::string ipaddr); + Periph_fpga(uint global_nr, std::string ipaddr, uint n_beamsets); ~Periph_fpga(); diff --git a/src/registers.h b/src/registers.h index 7c2f4f9251a8041ae23ecc331d5688cb9b56c88d..04d1d5fd4b0d2d93106acb63a039f00665b1d6da 100644 --- a/src/registers.h +++ b/src/registers.h @@ -40,6 +40,7 @@ #define REG_ADDR_ROM_SYSTEM (0x10000) #define REG_ADDR_ROM_SYSTEM_SPAN (8192) + #define REG_FORMAT_UNKNOWN 0 #define REG_FORMAT_BOOLEAN 1 #define REG_FORMAT_INT8 2 diff --git a/src/sdptr.cpp b/src/sdptr.cpp index 87a1b0164ee0c584406aeabe5a3d0079dc5b4af4..4002c3b7b54624e0ba2f9a865b38e3f3485404eb 100644 --- a/src/sdptr.cpp +++ b/src/sdptr.cpp @@ -105,29 +105,24 @@ void server_init(bool warm_start) p->parseFile(SD.configfile); // parse the configuration file p->dumpFileValues(); // print map on the console after parsing it - int32_t n_fpgas = 0; - int32_t first_fpga_nr = 0; - int32_t n_beamsets = 0; - string ip_prefix = ""; - - p->getValue(SD.ant_band_station_type, "n_fpgas", n_fpgas); - p->getValue(SD.ant_band_station_type, "first_fpga_nr", first_fpga_nr); - p->getValue(SD.ant_band_station_type, "n_beamsets", n_beamsets); - p->getValue(SD.ant_band_station_type, "ip_prefix", ip_prefix); + p->getValue(SD.ant_band_station_type, "n_fpgas", SD.n_fpgas); + p->getValue(SD.ant_band_station_type, "first_fpga_nr", SD.first_fpga_nr); + p->getValue(SD.ant_band_station_type, "n_beamsets", SD.n_beamsets); + p->getValue(SD.ant_band_station_type, "ip_prefix", SD.ip_prefix); - if (n_fpgas == 0) { + if (SD.n_fpgas == 0) { cerr << "ERROR, no settings found for '" << SD.ant_band_station_type << "'" <<endl; exit(EXIT_FAILURE); } list<class NODE_config> NC; - for (int i=0; i<n_fpgas; i++) { + for (int i=0; i<SD.n_fpgas; i++) { NODE_config nc; - nc.gn = first_fpga_nr + i; + nc.gn = SD.first_fpga_nr + i; int32_t board_nr = (int32_t)(nc.gn / FPGAS_PER_BOARD); int32_t fpga_nr = (int32_t)(nc.gn % FPGAS_PER_BOARD); - nc.ipaddr = ip_prefix + to_string(board_nr) + "." + to_string(fpga_nr+1); - nc.n_beamsets = n_beamsets; + nc.ipaddr = SD.ip_prefix + to_string(board_nr) + "." + to_string(fpga_nr+1); + nc.n_beamsets = SD.n_beamsets; NC.push_back(nc); } @@ -149,10 +144,10 @@ void server_init(bool warm_start) uint n = GLOBALNODE_to_NODE(gn); string type = GLOBALNODE_to_TYPE(gn); - Node *node = new Node(nc.ipaddr, uniboardnr, n, type); + Node *node = new Node(nc.ipaddr, uniboardnr, n, type, nc.n_beamsets); nodelist.push_back(node); } - SD.unb = new UniboardMap(nodelist); + SD.unb = new UniboardMap(nodelist, SD.n_beamsets); ua_server_init(warm_start); @@ -183,6 +178,12 @@ int main (int argc, char* argv[]) SD.configfile = "/etc/sdptr.conf"; SD.ant_band_station_type = "-"; + + // set default values + SD.n_fpgas = 16; + SD.first_fpga_nr = 0; + SD.n_beamsets = 1; + SD.ip_prefix = "10.99."; atomic<size_t> ncthreads(0); thread *monitor_thread; diff --git a/src/sdptr.h b/src/sdptr.h index 6ba538c1c3962e1919ef6535cbe526654deeb594..e227e645b3e935441f87684db7d0fa475d7c6168 100644 --- a/src/sdptr.h +++ b/src/sdptr.h @@ -50,6 +50,11 @@ public: std::string configfile; std::string ant_band_station_type; + + int32_t n_fpgas; + int32_t first_fpga_nr; + int32_t n_beamsets; + std::string ip_prefix; struct timespec t0; volatile time_t timetick; diff --git a/src/tr.cpp b/src/tr.cpp index 16cda715874db3432e1eb6c6dd265432cc046945..8c4f8a3c797c3bde3a138fe7c95399f68d81cb31 100644 --- a/src/tr.cpp +++ b/src/tr.cpp @@ -49,14 +49,14 @@ TranslatorMap::TranslatorMap() { translatorMap = new CPointMap(); - translatorMap->add_register("TR_fpga_mask_R", "-", C_N_pn, 1, "RO", REG_FORMAT_BOOLEAN); - translatorMap->add_register("TR_fpga_mask_RW", "-", C_N_pn, 1, "RW", REG_FORMAT_BOOLEAN); - translatorMap->add_register("TR_software_version_R", "-", 1, 1, "RO", REG_FORMAT_STRING); - translatorMap->add_register("TR_start_time_R", "-", 1, 1, "RO", REG_FORMAT_INT64); - // translatorMap->add_register("TR_tod_client_status_R", "-", 1, 1, "RO", REG_FORMAT_BOOLEAN); // TODO: PTP client is part of linux, can I get a status? - translatorMap->add_register("TR_tod_R", "-", 1, 2, "RO", REG_FORMAT_INT64); - translatorMap->add_register("TR_tod_pps_delta_R", "-", 1, 1, "RO", REG_FORMAT_DOUBLE); - translatorMap->add_register("TR_fpga_communication_error_R", "-", C_N_pn, 1, "RO", REG_FORMAT_BOOLEAN); + translatorMap->add_register("TR_fpga_mask_R", "-", SD.n_fpgas, 1, "RO", REG_FORMAT_BOOLEAN); + translatorMap->add_register("TR_fpga_mask_RW", "-", SD.n_fpgas, 1, "RW", REG_FORMAT_BOOLEAN); + translatorMap->add_register("TR_software_version_R", "-", 1, 1, "RO", REG_FORMAT_STRING); + translatorMap->add_register("TR_start_time_R", "-", 1, 1, "RO", REG_FORMAT_INT64); + // translatorMap->add_register("TR_tod_client_status_R", "-", 1, 1, "RO", REG_FORMAT_BOOLEAN); // TODO: PTP client is part of linux, can I get a status? + translatorMap->add_register("TR_tod_R", "-", 1, 2, "RO", REG_FORMAT_INT64); + translatorMap->add_register("TR_tod_pps_delta_R", "-", 1, 1, "RO", REG_FORMAT_DOUBLE); + translatorMap->add_register("TR_fpga_communication_error_R", "-", SD.n_fpgas, 1, "RO", REG_FORMAT_BOOLEAN); // translatorMap->add_register("TR_reload_RW", "-", 1, 1, "RW", REG_FORMAT_BOOLEAN); // Maybe for future. }