diff --git a/src/fpga.cpp b/src/fpga.cpp
index 2ab6fd4177d72619082a37bed5d5070aea5a980c..275f4658117ea65a48ac6a41226fbdd2de0083bc 100644
--- a/src/fpga.cpp
+++ b/src/fpga.cpp
@@ -161,6 +161,9 @@ Fpga::Fpga(list<class Node*>& nodelist, const int32_t n_beamsets):
     
     pointMap->add_register("FPGA_signal_input_data_buffer_R",                "fpga/signal_input_data_buffer",               nodes.size(), C_S_pn*C_V_si_db, "RO", REG_FORMAT_INT16);
     pointMap->add_register("FPGA_signal_input_histogram_R",                  "fpga/signal_input_histogram",                 nodes.size(), C_S_pn*C_V_si_histogram, "RO", REG_FORMAT_UINT32);
+
+    pointMap->add_register("FPGA_subband_spectral_inversion_R",              "fpga/subband_spectral_inversion",             nodes.size(), 1, "R", REG_FORMAT_BOOLEAN);
+    pointMap->add_register("FPGA_subband_spectral_inversion_RW",             "fpga/subband_spectral_inversion",             nodes.size(), 1, "RW", REG_FORMAT_BOOLEAN);
 }
 
 Fpga::~Fpga()
diff --git a/src/periph/fpga.cpp b/src/periph/fpga.cpp
index fe11864e5b7c53cfaaeccfd468a4d870f43b06e2..fba5c3ac1cfc03dee0c8c6bc998424e44ba4475b 100644
--- a/src/periph/fpga.cpp
+++ b/src/periph/fpga.cpp
@@ -338,6 +338,9 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
         else if (addr == "fpga/signal_input_histogram") {
             retval = read_all_from_port(termout, "RAM_ST_HISTOGRAM", "data", format);
         }
+        else if (addr == "fpga/subband_spectral_inversion") {
+            retval = read_all_from_port(termout, "REG_SI", "enable", format);
+        }
         else {
             throw runtime_error("address " + addr + " not found!");
         }
@@ -515,6 +518,9 @@ bool Periph_fpga::write(TermOutput& termout, const string addr, const string typ
         else if (addr == "fpga/subband_weights") {
             retval = write_subband_weights(data);
         }
+        else if (addr == "fpga/subband_spectral_inversion") {
+            retval = write_subband_spectral_inversion(data);
+        }
         else {
             throw runtime_error("address " + addr + " not found!");
         }
@@ -2268,3 +2274,11 @@ CMMap Periph_fpga::read_reg_map()
     return mmap_to_regmap(iss_regmap);
 }
 
+
+bool Periph_fpga::write_subband_spectral_inversion(const char *data)
+{
+    uint32_t _data[1];
+    _data[0] = (uint32_t)data[0];
+    return Write("mm/0/REG_SI/0/enable", _data);
+}
+
diff --git a/src/periph/fpga.h b/src/periph/fpga.h
index 3c1c09816b7bfea2c050d0f3b97d0f688d72101f..0d08dbad526df2067dbc5a3b1721ef6ea0ac60fb 100644
--- a/src/periph/fpga.h
+++ b/src/periph/fpga.h
@@ -179,6 +179,8 @@ private:
 
   bool read_all_from_port(TermOutput& termout, const std::string& port_name, const std::string& field_name, const int format);
 
+  bool write_subband_spectral_inversion(const char *data);
+
   CMMap read_reg_map();
 
 public: