diff --git a/src/periph/fpga.cpp b/src/periph/fpga.cpp
index 9bb51e406a0f03b68d806b74182a3d4a4f187959..5059405ba40e5ae1131b59b33c72c481baa8e066 100644
--- a/src/periph/fpga.cpp
+++ b/src/periph/fpga.cpp
@@ -188,10 +188,10 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
retval = read_all_from_port(termout, "REG_STAT_ENABLE_SST", "enable", format);
}
else if (addr == "fpga/sst_offload_hdr_eth_destination_mac") {
- retval = read_sst_offload_hdr_eth_destination_mac(termout, format);
+ retval = read_eth_destination_mac(termout, "REG_STAT_HDR_DAT_SST", 1, format);
}
else if (addr == "fpga/sst_offload_hdr_ip_destination_address") {
- retval = read_sst_offload_hdr_ip_destination_address(termout, format);
+ retval = read_ip_destination_address(termout, "REG_STAT_HDR_DAT_SST", 1, format);
}
else if (addr == "fpga/sst_offload_hdr_udp_destination_port") {
retval = read_all_from_port(termout, "REG_STAT_HDR_DAT_SST", "udp_destination_port", format);
@@ -200,10 +200,10 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
retval = read_all_from_port(termout, "REG_STAT_ENABLE_BST", "enable", format);
}
else if (addr == "fpga/bst_offload_hdr_eth_destination_mac") {
- retval = read_bst_offload_hdr_eth_destination_mac(termout, format);
+ retval = read_eth_destination_mac(termout, "REG_STAT_HDR_DAT_BST", nBeamsets, format);
}
else if (addr == "fpga/bst_offload_hdr_ip_destination_address") {
- retval = read_bst_offload_hdr_ip_destination_address(termout, format);
+ retval = read_ip_destination_address(termout, "REG_STAT_HDR_DAT_BST", nBeamsets, format);
}
else if (addr == "fpga/bst_offload_hdr_udp_destination_port") {
retval = read_all_from_port(termout,"REG_STAT_HDR_DAT_BST", "udp_destination_port", format);
@@ -216,10 +216,10 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
retval = read_all_from_port(termout, "REG_NOF_CROSSLETS", "nof_crosslets", format);
}
else if (addr == "fpga/xst_offload_hdr_eth_destination_mac") {
- retval = read_xst_offload_hdr_eth_destination_mac(termout, format);
+ retval = read_eth_destination_mac(termout, "REG_STAT_HDR_DAT_XST", 1, format);
}
else if (addr == "fpga/xst_offload_hdr_ip_destination_address") {
- retval = read_xst_offload_hdr_ip_destination_address(termout, format);
+ retval = read_ip_destination_address(termout, "REG_STAT_HDR_DAT_XST", 1, format);
}
else if (addr == "fpga/xst_offload_hdr_udp_destination_port") {
retval = read_all_from_port(termout, "REG_STAT_HDR_DAT_XST", "udp_destination_port", format);
@@ -250,10 +250,10 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
retval = read_beamlet_output_nof_beamlets(termout, format);
}
else if (addr == "fpga/beamlet_output_hdr_eth_destination_mac") {
- retval = read_beamlet_output_hdr_eth_destination_mac(termout, format);
+ retval = read_eth_destination_mac(termout, "REG_HDR_DAT", nBeamsets, format);
}
else if (addr == "fpga/beamlet_output_hdr_ip_destination_address") {
- retval = read_beamlet_output_hdr_ip_destination_address(termout, format);
+ retval = read_ip_destination_address(termout, "REG_HDR_DAT", nBeamsets, format);
}
else if (addr == "fpga/beamlet_output_hdr_udp_destination_port") {
retval = read_all_from_port(termout, "REG_HDR_DAT", "udp_destination_port", format);
@@ -332,7 +332,8 @@ bool Periph_fpga::read(TermOutput& termout, const string addr,
retval = read_all_from_port(termout, "RAM_EQUALIZER_GAINS", "data", format);
}
else if (addr == "fpga/signal_input_data_buffer") {
- retval = read_all_from_port(termout, "RAM_DIAG_DATA_BUFFER_BSN", "data", format);
+ // retval = read_all_from_port(termout, "RAM_DIAG_DATA_BUFFER_BSN", "data", format);
+ retval = read_signal_input_data_buffer(termout, format);
}
else if (addr == "fpga/signal_input_histogram") {
retval = read_all_from_port(termout, "RAM_ST_HISTOGRAM", "data", format);
@@ -422,25 +423,25 @@ bool Periph_fpga::write(TermOutput& termout, const string addr, const string typ
retval = write_sst_offload_enable(data);
}
else if (addr == "fpga/sst_offload_hdr_eth_destination_mac") {
- retval = write_sst_offload_hdr_eth_destination_mac(data);
+ retval = write_eth_destination_mac(data, "REG_STAT_HDR_DAT_SST", 1);
}
else if (addr == "fpga/sst_offload_hdr_ip_destination_address") {
- retval = write_sst_offload_hdr_ip_destination_address(data);
+ retval = write_ip_destination_address(data, "REG_STAT_HDR_DAT_SST", 1);
}
else if (addr == "fpga/sst_offload_hdr_udp_destination_port") {
- retval = write_sst_offload_hdr_udp_destination_port(data);
+ retval = write_udp_destination_port(data, "REG_STAT_HDR_DAT_SST", 1);
}
else if (addr == "fpga/bst_offload_enable") {
retval = write_bst_offload_enable(data);
}
else if (addr == "fpga/bst_offload_hdr_eth_destination_mac") {
- retval = write_bst_offload_hdr_eth_destination_mac(data);
+ retval = write_eth_destination_mac(data, "REG_STAT_HDR_DAT_BST", nBeamsets);
}
else if (addr == "fpga/bst_offload_hdr_ip_destination_address") {
- retval = write_bst_offload_hdr_ip_destination_address(data);
+ retval = write_ip_destination_address(data, "REG_STAT_HDR_DAT_BST", nBeamsets);
}
else if (addr == "fpga/bst_offload_hdr_udp_destination_port") {
- retval = write_bst_offload_hdr_udp_destination_port(data);
+ retval = write_udp_destination_port(data, "REG_STAT_HDR_DAT_BST", nBeamsets);
}
else if (addr == "fpga/xst_offload_enable") {
retval = write_xst_offload_enable(data);
@@ -449,13 +450,13 @@ bool Periph_fpga::write(TermOutput& termout, const string addr, const string typ
retval = write_xst_offload_nof_crosslets(data);
}
else if (addr == "fpga/xst_offload_hdr_eth_destination_mac") {
- retval = write_xst_offload_hdr_eth_destination_mac(data);
+ retval = write_eth_destination_mac(data, "REG_STAT_HDR_DAT_XST", 1);
}
else if (addr == "fpga/xst_offload_hdr_ip_destination_address") {
- retval = write_xst_offload_hdr_ip_destination_address(data);
+ retval = write_ip_destination_address(data, "REG_STAT_HDR_DAT_XST", 1);
}
else if (addr == "fpga/xst_offload_hdr_udp_destination_port") {
- retval = write_xst_offload_hdr_udp_destination_port(data);
+ retval = write_udp_destination_port(data, "REG_STAT_HDR_DAT_XST", 1);
}
else if (addr == "fpga/xst_processing_enable") {
retval = write_xst_processing_enable(data);
@@ -476,13 +477,13 @@ bool Periph_fpga::write(TermOutput& termout, const string addr, const string typ
retval = write_beamlet_output_nof_beamlets(data);
}
else if (addr == "fpga/beamlet_output_hdr_eth_destination_mac") {
- retval = write_beamlet_output_hdr_eth_destination_mac(data);
+ retval = write_eth_destination_mac(data, "REG_HDR_DAT", nBeamsets);
}
else if (addr == "fpga/beamlet_output_hdr_ip_destination_address") {
- retval = write_beamlet_output_hdr_ip_destination_address(data);
+ retval = write_ip_destination_address(data, "REG_HDR_DAT", nBeamsets);
}
else if (addr == "fpga/beamlet_output_hdr_udp_destination_port") {
- retval = write_beamlet_output_hdr_udp_destination_port(data);
+ retval = write_udp_destination_port(data, "REG_HDR_DAT", nBeamsets);
}
else if (addr == "fpga/processing_enable") {
retval = write_processing_enable(data);
@@ -1079,106 +1080,7 @@ bool Periph_fpga::write_sst_offload_enable(const char *data)
}
-bool Periph_fpga::read_sst_offload_hdr_eth_destination_mac(TermOutput& termout, int format)
-{
- bool retval = true;
-
- uint32_t data[20];
- memset((void *)data, 0, sizeof(data));
- retval = Read("mm/0/REG_STAT_HDR_DAT_SST/0/eth_destination_mac", data);
-
- uint64_t mac = (uint64_t)data[1] << 32 | data[0];
-
- stringstream mac_ss;
- for (int i=5; i>=0; i--) {
- mac_ss << setfill('0') << setw(2) << right << hex << ((mac >> (i * 8)) & 0xff);
- if (i > 0) {
- mac_ss << ":";
- }
- }
- string mac_str = mac_ss.str();
- strcpy(termout.val, mac_str.c_str());
- termout.nof_vals = 1;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_sst_offload_hdr_eth_destination_mac(const char *data)
-{
- // cout << "data=" << string(data) << endl;
- char sep;
- uint32_t m0, m1, m2, m3, m4, m5;
- uint32_t mac[2] {0, 0};
- string ds(data);
- stringstream ss(ds);
- ss >> setbase(16) >> m0 >> sep >> m1 >> sep >> m2 >> sep >> m3 >> sep >> m4 >> sep >> m5;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_sst_offload_hdr_eth_destination_mac (" << ds << ")" << endl;
- return false;
- }
- mac[1] = (m0 << 8) + (m1 << 0);
- mac[0] = (m2 << 24) + (m3 << 16) + (m4 << 8) + m5;
- // cout << "mac=" << mac[1] << ", " << mac[0] << endl;
- return Write("mm/0/REG_STAT_HDR_DAT_SST/0/eth_destination_mac", mac);
-}
-
-bool Periph_fpga::read_sst_offload_hdr_ip_destination_address(TermOutput& termout, int format)
-{
- bool retval = true;
-
- uint32_t data[20];
- memset((void *)data, 0, sizeof(data));
- retval = Read("mm/0/REG_STAT_HDR_DAT_SST/0/ip_destination_address", data);
-
- stringstream ip_ss;
- for (int i=3; i>=0; i--) {
- ip_ss << dec << ((data[0] >> (i * 8)) & 0xff);
- if (i > 0) {
- ip_ss << ".";
- }
- }
-
- string ip_str = ip_ss.str();
- strcpy(termout.val, ip_str.c_str());
- termout.nof_vals = 1;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_sst_offload_hdr_ip_destination_address(const char *data)
-{
- char sep;
- uint ip0, ip1, ip2, ip3;
- uint32_t ip[1] = {0};
- string ds(data);
- cout << "write_ip=[" << ds << "]" << endl;
- stringstream ss(ds);
- ss >> setbase(10) >> ip0;
- ss >> sep;
- ss >> setbase(10) >> ip1;
- ss >> sep;
- ss >> setbase(10) >> ip2;
- ss >> sep;
- ss >> setbase(10) >> ip3;
- cout << "ip0=" << to_string(ip0) << " ip1=" << to_string(ip1) << " ip2=" << to_string(ip2) << " ip3=" << to_string(ip3) << endl;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_sst_offload_hdr_ip_destination_address (" << ds << ")" << endl;
- return false;
- }
- ip[0] += (ip0 & 0xff) << 24;
- ip[0] += (ip1 & 0xff) << 16;
- ip[0] += (ip2 & 0xff) << 8;
- ip[0] += ip3 & 0xff;
- cout << "ip=" << hex << ip[0] << endl;
- return Write("mm/0/REG_STAT_HDR_DAT_SST/0/ip_destination_address", ip);
-}
-
-bool Periph_fpga::write_sst_offload_hdr_udp_destination_port(const char *data)
-{
- uint32_t *_ptr = (uint32_t *)data;
- return Write("mm/0/REG_STAT_HDR_DAT_SST/0/udp_destination_port", _ptr);
-}
bool Periph_fpga::write_bst_offload_enable(const char *data)
{
@@ -1195,149 +1097,7 @@ bool Periph_fpga::write_bst_offload_enable(const char *data)
}
-bool Periph_fpga::read_bst_offload_hdr_eth_destination_mac(TermOutput& termout, int format)
-{
- bool retval = true;
- string regname;
-
- uint32_t data[20];
- // uint64_t mac;
- stringstream mac_ss;
- string mac_str;
- for (uint32_t i=0; i<nBeamsets; i++) {
- memset((void *)data, 0, sizeof(data));
- regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/eth_destination_mac";
- retval &= Read(regname, data);
- uint64_t mac = (uint64_t)data[1] << 32 | data[0];
-
- mac_ss.clear();
- mac_ss.str("");
- for (int j=5; j>=0; j--) {
- mac_ss << setfill('0') << setw(2) << right << hex << ((mac >> (j * 8)) & 0xff);
- if (j > 0) {
- mac_ss << ":";
- }
- }
- mac_str = mac_ss.str();
- // cout << "bst_eth_destination_mac: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << mac_str << ", retval=" << retval << endl;
- strcpy(&(termout.val[i*SIZE1STRING]), mac_str.c_str());
- }
- termout.nof_vals = nBeamsets;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_bst_offload_hdr_eth_destination_mac(const char *data)
-{
- // cout << "data=" << string(data) << endl;
- bool retval = true;
- string regname;
- char sep;
- uint32_t m0, m1, m2, m3, m4, m5;
- uint32_t mac[2] {0, 0};
- string ds;
- stringstream ss;
- for (uint32_t i=0; i<nBeamsets; i++) {
- ss.clear();
- ss.str("");
- regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/eth_destination_mac";
- ds = &data[i*SIZE1STRING];
- cout << ds << endl;
- ss << ds;
- ss >> setbase(16) >> m0 >> sep >> m1 >> sep >> m2 >> sep >> m3 >> sep >> m4 >> sep >> m5;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_bst_offload_hdr_eth_destination_mac (" << ds << ")" << endl;
- return false;
- }
- mac[1] = (m0 << 8) + (m1 << 0);
- mac[0] = (m2 << 24) + (m3 << 16) + (m4 << 8) + m5;
- // cout << "mac=" << mac[1] << ", " << mac[0] << endl;
- retval &= Write(regname, mac);
- }
- return retval;
-}
-
-bool Periph_fpga::read_bst_offload_hdr_ip_destination_address(TermOutput& termout, int format)
-{
- bool retval = true;
- string regname;
-
- uint32_t data[20];
- stringstream ip_ss;
- string ip_str;
- for (uint32_t i=0; i<nBeamsets; i++) {
- memset((void *)data, 0, sizeof(data));
- regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/ip_destination_address";
- retval &= Read(regname, data);
- ip_ss.clear();
- ip_ss.str("");
- for (int j=3; j>=0; j--) {
- ip_ss << dec << ((data[0] >> (j * 8)) & 0xff);
- if (j > 0) {
- ip_ss << ".";
- }
- }
- ip_str = ip_ss.str();
- // cout << "bst_ip_destination_address: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << ip_str << ", retval=" << retval << endl;
- strcpy(&termout.val[i*SIZE1STRING], ip_str.c_str());
- }
- termout.nof_vals = nBeamsets;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_bst_offload_hdr_ip_destination_address(const char *data)
-{
- bool retval = true;
- string regname;
- char sep;
- uint ip0, ip1, ip2, ip3;
- uint32_t ip[1] = {0};
- string ds;
- stringstream ss;
- for (uint32_t i=0; i<nBeamsets; i++) {
- ss.clear();
- ss.str("");
- regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/ip_destination_address";
- // cout << "write_ip=[" << ds << "]" << endl;
- ds = &data[i*SIZE1STRING];
- cout << ds << endl;
- ss << ds;
- ss >> setbase(10) >> ip0;
- ss >> sep;
- ss >> setbase(10) >> ip1;
- ss >> sep;
- ss >> setbase(10) >> ip2;
- ss >> sep;
- ss >> setbase(10) >> ip3;
- // cout << "ip0=" << to_string(ip0) << " ip1=" << to_string(ip1) << " ip2=" << to_string(ip2) << " ip3=" << to_string(ip3) << endl;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_bst_offload_hdr_ip_destination_address (" << ds << ")" << endl;
- return false;
- }
- ip[0] = (ip0 & 0xff) << 24;
- ip[0] += (ip1 & 0xff) << 16;
- ip[0] += (ip2 & 0xff) << 8;
- ip[0] += ip3 & 0xff;
- cout << "ip=" << hex << ip[0] << endl;
- if (Write(regname, ip) == false) {
- retval = false;
- }
- }
- return retval;
-}
-bool Periph_fpga::write_bst_offload_hdr_udp_destination_port(const char *data)
-{
- uint32_t *_ptr = (uint32_t *)data;
- bool retval = true;
- string regname;
- for (uint32_t i=0; i<nBeamsets; i++) {
- regname = "mm/" + to_string(i) + "/REG_STAT_HDR_DAT_BST/0/udp_destination_port";
- retval &= Write(regname, &_ptr[i]);
- }
- return retval;
-}
bool Periph_fpga::write_beamlet_output_enable(const char *data)
{
@@ -1443,20 +1203,33 @@ bool Periph_fpga::write_beamlet_output_nof_beamlets(const char *data)
}
+bool Periph_fpga::write_xst_offload_enable(const char *data)
+{
+ uint32_t _data[1];
+ _data[0] = (bool)data[0];
+ return Write("mm/0/REG_STAT_ENABLE_XST/0/enable", _data);
+}
+
+bool Periph_fpga::write_xst_offload_nof_crosslets(const char *data)
+{
+ uint32_t *_ptr = (uint32_t *)data;
+ return Write("mm/0/REG_NOF_CROSSLETS/0/nof_crosslets", _ptr);
+}
-bool Periph_fpga::read_beamlet_output_hdr_eth_destination_mac(TermOutput& termout, int format)
+//TODO, add beamsets (n_instances)
+bool Periph_fpga::read_eth_destination_mac(TermOutput& termout, const string& port_name, const int n_instances, const int format)
{
- bool retval = true;
+ bool retval = true;
string regname;
uint32_t data[20];
// uint64_t mac;
stringstream mac_ss;
string mac_str;
- for (uint32_t i=0; i<nBeamsets; i++) {
+ for (int i=0; i<n_instances; i++) {
memset((void *)data, 0, sizeof(data));
- regname = "mm/" + to_string(i) + "/REG_HDR_DAT/0/eth_destination_mac";
+ regname = "mm/" + to_string(i) + "/" + port_name + "/0/eth_destination_mac";
retval &= Read(regname, data);
uint64_t mac = (uint64_t)data[1] << 32 | data[0];
@@ -1469,15 +1242,15 @@ bool Periph_fpga::read_beamlet_output_hdr_eth_destination_mac(TermOutput& termou
}
}
mac_str = mac_ss.str();
- // cout << "bst_eth_destination_mac: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << mac_str << ", retval=" << retval << endl;
+ // cout << "eth_destination_mac: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << mac_str << ", retval=" << retval << endl;
strcpy(&(termout.val[i*SIZE1STRING]), mac_str.c_str());
}
- termout.nof_vals = nBeamsets;
+ termout.nof_vals = n_instances;
termout.datatype = format;
return retval;
}
-bool Periph_fpga::write_beamlet_output_hdr_eth_destination_mac(const char *data)
+bool Periph_fpga::write_eth_destination_mac(const char *data, const string& port_name, const int n_instances)
{
// cout << "data=" << string(data) << endl;
bool retval = true;
@@ -1487,16 +1260,16 @@ bool Periph_fpga::write_beamlet_output_hdr_eth_destination_mac(const char *data)
uint32_t mac[2] {0, 0};
string ds;
stringstream ss;
- for (uint32_t i=0; i<nBeamsets; i++) {
+ for (int i=0; i<n_instances; i++) {
ss.clear();
ss.str("");
- regname = "mm/" + to_string(i) + "/REG_HDR_DAT/0/eth_destination_mac";
+ regname = "mm/" + to_string(i) + "/" + port_name + "/0/eth_destination_mac";
ds = &data[i*SIZE1STRING];
cout << ds << endl;
ss << ds;
ss >> setbase(16) >> m0 >> sep >> m1 >> sep >> m2 >> sep >> m3 >> sep >> m4 >> sep >> m5;
if (ss.fail() || ss.bad()) {
- cout << "parse error in write_beamlet_output_hdr_eth_destination_mac (" << ds << ")" << endl;
+ cout << "parse error in write_eth_destination_mac (" << ds << ")" << endl;
return false;
}
mac[1] = (m0 << 8) + (m1 << 0);
@@ -1507,7 +1280,7 @@ bool Periph_fpga::write_beamlet_output_hdr_eth_destination_mac(const char *data)
return retval;
}
-bool Periph_fpga::read_beamlet_output_hdr_ip_destination_address(TermOutput& termout, int format)
+bool Periph_fpga::read_ip_destination_address(TermOutput& termout, const string& port_name, const int n_instances, const int format)
{
bool retval = true;
string regname;
@@ -1515,9 +1288,9 @@ bool Periph_fpga::read_beamlet_output_hdr_ip_destination_address(TermOutput& ter
uint32_t data[20];
stringstream ip_ss;
string ip_str;
- for (uint32_t i=0; i<nBeamsets; i++) {
+ for (int i=0; i<n_instances; i++) {
memset((void *)data, 0, sizeof(data));
- regname = "mm/" + to_string(i) + "/REG_HDR_DAT/0/ip_destination_address";
+ regname = "mm/" + to_string(i) + "/" + port_name + "/0/ip_destination_address";
retval &= Read(regname, data);
ip_ss.clear();
ip_ss.str("");
@@ -1528,15 +1301,15 @@ bool Periph_fpga::read_beamlet_output_hdr_ip_destination_address(TermOutput& ter
}
}
ip_str = ip_ss.str();
- // cout << "bst_ip_destination_address: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << ip_str << ", retval=" << retval << endl;
+ // cout << "ip_destination_address: " << regname << ", data[0]=" << to_string(data[0]) << ", str=" << ip_str << ", retval=" << retval << endl;
strcpy(&termout.val[i*SIZE1STRING], ip_str.c_str());
}
- termout.nof_vals = nBeamsets;
+ termout.nof_vals = n_instances;
termout.datatype = format;
return retval;
}
-bool Periph_fpga::write_beamlet_output_hdr_ip_destination_address(const char *data)
+bool Periph_fpga::write_ip_destination_address(const char *data, const string& port_name, const int n_instances)
{
bool retval = true;
string regname;
@@ -1545,10 +1318,10 @@ bool Periph_fpga::write_beamlet_output_hdr_ip_destination_address(const char *da
uint32_t ip[1] = {0};
string ds;
stringstream ss;
- for (uint32_t i=0; i<nBeamsets; i++) {
+ for (int i=0; i<n_instances; i++) {
ss.clear();
ss.str("");
- regname = "mm/" + to_string(i) + "/REG_HDR_DAT/0/ip_destination_address";
+ regname = "mm/" + to_string(i) + "/" + port_name + "/0/ip_destination_address";
// cout << "write_ip=[" << ds << "]" << endl;
ds = &data[i*SIZE1STRING];
cout << ds << endl;
@@ -1562,14 +1335,14 @@ bool Periph_fpga::write_beamlet_output_hdr_ip_destination_address(const char *da
ss >> setbase(10) >> ip3;
// cout << "ip0=" << to_string(ip0) << " ip1=" << to_string(ip1) << " ip2=" << to_string(ip2) << " ip3=" << to_string(ip3) << endl;
if (ss.fail() || ss.bad()) {
- cout << "parse error in write_beamlet_output_hdr_ip_destination_address (" << ds << ")" << endl;
+ cout << "parse error in write_ip_destination_address (" << ds << ")" << endl;
return false;
}
ip[0] = (ip0 & 0xff) << 24;
ip[0] += (ip1 & 0xff) << 16;
ip[0] += (ip2 & 0xff) << 8;
ip[0] += ip3 & 0xff;
- cout << "ip=" << hex << ip[0] << endl;
+ // cout << "portname=" << port_name << ", ip=" << hex << ip[0] << endl;
if (Write(regname, ip) == false) {
retval = false;
}
@@ -1577,13 +1350,13 @@ bool Periph_fpga::write_beamlet_output_hdr_ip_destination_address(const char *da
return retval;
}
-bool Periph_fpga::write_beamlet_output_hdr_udp_destination_port(const char *data)
+bool Periph_fpga::write_udp_destination_port(const char *data, const string& port_name, const int n_instances)
{
uint32_t *_ptr = (uint32_t *)data;
bool retval = true;
string regname;
- for (uint32_t i=0; i<nBeamsets; i++) {
- regname = "mm/" + to_string(i) + "/REG_HDR_DAT/0/udp_destination_port";
+ for (int i=0; i<n_instances; i++) {
+ regname = "mm/" + to_string(i) + "/" + port_name + "/0/udp_destination_port";
retval &= Write(regname, &_ptr[i]);
}
return retval;
@@ -1591,123 +1364,6 @@ bool Periph_fpga::write_beamlet_output_hdr_udp_destination_port(const char *data
-
-
-
-bool Periph_fpga::write_xst_offload_enable(const char *data)
-{
- uint32_t _data[1];
- _data[0] = (bool)data[0];
- return Write("mm/0/REG_STAT_ENABLE_XST/0/enable", _data);
-}
-
-bool Periph_fpga::write_xst_offload_nof_crosslets(const char *data)
-{
- uint32_t *_ptr = (uint32_t *)data;
- return Write("mm/0/REG_NOF_CROSSLETS/0/nof_crosslets", _ptr);
-}
-
-bool Periph_fpga::read_xst_offload_hdr_eth_destination_mac(TermOutput& termout, int format)
-{
- bool retval = true;
-
- uint32_t data[20];
- memset((void *)data, 0, sizeof(data));
- retval = Read("mm/0/REG_STAT_HDR_DAT_XST/0/eth_destination_mac", data);
-
- uint64_t mac = (uint64_t)data[1] << 32 | data[0];
-
- stringstream mac_ss;
- for (int i=5; i>=0; i--) {
- mac_ss << setfill('0') << setw(2) << right << hex << ((mac >> (i * 8)) & 0xff);
- if (i > 0) {
- mac_ss << ":";
- }
- }
-
- string mac_str = mac_ss.str();
- strcpy(termout.val, mac_str.c_str());
- termout.nof_vals = 1;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_xst_offload_hdr_eth_destination_mac(const char *data)
-{
- // cout << "data=" << string(data) << endl;
- char sep;
- uint32_t m0, m1, m2, m3, m4, m5;
- uint32_t mac[2] {0, 0};
- string ds(data);
- stringstream ss(ds);
- ss >> setbase(16) >> m0 >> sep >> m1 >> sep >> m2 >> sep >> m3 >> sep >> m4 >> sep >> m5;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_xst_offload_hdr_eth_destination_mac (" << ds << ")" << endl;
- return false;
- }
- mac[1] = (m0 << 8) + (m1 << 0);
- mac[0] = (m2 << 24) + (m3 << 16) + (m4 << 8) + m5;
- // cout << "mac=" << mac[1] << ", " << mac[0] << endl;
- return Write("mm/0/REG_STAT_HDR_DAT_XST/0/eth_destination_mac", mac);
-}
-
-bool Periph_fpga::read_xst_offload_hdr_ip_destination_address(TermOutput& termout, int format)
-{
- bool retval = true;
-
- uint32_t data[20];
- memset((void *)data, 0, sizeof(data));
- retval = Read("mm/0/REG_STAT_HDR_DAT_XST/0/ip_destination_address", data);
-
- stringstream ip_ss;
- for (int i=3; i>=0; i--) {
- ip_ss << dec << ((data[0] >> (i * 8)) & 0xff);
- if (i > 0) {
- ip_ss << ".";
- }
- }
-
- string ip_str = ip_ss.str();
- strcpy(termout.val, ip_str.c_str());
- termout.nof_vals = 1;
- termout.datatype = format;
- return retval;
-}
-
-bool Periph_fpga::write_xst_offload_hdr_ip_destination_address(const char *data)
-{
- char sep;
- uint ip0, ip1, ip2, ip3;
- uint32_t ip[1] = {0};
- string ds(data);
- cout << "write_ip=[" << ds << "]" << endl;
- stringstream ss(ds);
- ss >> setbase(10) >> ip0;
- ss >> sep;
- ss >> setbase(10) >> ip1;
- ss >> sep;
- ss >> setbase(10) >> ip2;
- ss >> sep;
- ss >> setbase(10) >> ip3;
- // cout << "ip0=" << to_string(ip0) << " ip1=" << to_string(ip1) << " ip2=" << to_string(ip2) << " ip3=" << to_string(ip3) << endl;
- if (ss.fail() || ss.bad()) {
- cout << "parse error in write_xst_offload_hdr_ip_destination_address (" << ds << ")" << endl;
- return false;
- }
- ip[0] += (ip0 & 0xff) << 24;
- ip[0] += (ip1 & 0xff) << 16;
- ip[0] += (ip2 & 0xff) << 8;
- ip[0] += ip3 & 0xff;
- cout << "ip=" << hex << ip[0] << endl;
- return Write("mm/0/REG_STAT_HDR_DAT_XST/0/ip_destination_address", ip);
-}
-
-bool Periph_fpga::write_xst_offload_hdr_udp_destination_port(const char *data)
-{
- uint32_t *_ptr = (uint32_t *)data;
- return Write("mm/0/REG_STAT_HDR_DAT_XST/0/udp_destination_port", _ptr);
-}
-
bool Periph_fpga::read_xst_processing_enable(TermOutput& termout, int format)
{
bool retval = true;
@@ -2414,6 +2070,24 @@ bool Periph_fpga::read_signal_input_rms(TermOutput& termout, int format, int mod
return retval;
}
+bool Periph_fpga::read_signal_input_data_buffer(TermOutput& termout, int format) {
+ bool retval = true;
+ uint32_t data[C_V_si_db];
+ string regname;
+ int16_t *_ptr = (int16_t *)termout.val;
+ for (uint i=0; i< C_S_pn; i++) {
+ memset((void *)data, 0, sizeof(data));
+ regname = "mm/0/RAM_DIAG_DATA_BUFFER_BSN/" + to_string(i) + "/data";
+ retval &= Read(regname, data);
+ for (uint j=0; j< C_V_si_db; j++) {
+ *_ptr = (int16_t)((data[j] & 0x3FFF) << 2) / 4;
+ _ptr++;
+ }
+ }
+ termout.nof_vals = C_S_pn * C_V_si_db;
+ termout.datatype = format;
+ return retval;
+}
bool Periph_fpga::write_subband_weights(const char *data) {
uint32_t *_ptr = (uint32_t *)data;
diff --git a/src/periph/fpga.h b/src/periph/fpga.h
index 089f72b2972ab229b4fcbfbb6151a89cacc32289..41b7a1651ecc06fbc276c962559de408863d2bd3 100644
--- a/src/periph/fpga.h
+++ b/src/periph/fpga.h
@@ -113,18 +113,8 @@ private:
bool write_sst_offload_weighted_subbands(const char *data);
bool write_sst_offload_enable(const char *data);
- bool read_sst_offload_hdr_eth_destination_mac(TermOutput& termout, int format);
- bool write_sst_offload_hdr_eth_destination_mac(const char *data);
- bool read_sst_offload_hdr_ip_destination_address(TermOutput& termout, int format);
- bool write_sst_offload_hdr_ip_destination_address(const char *data);
- bool write_sst_offload_hdr_udp_destination_port(const char *data);
bool write_bst_offload_enable(const char *data);
- bool read_bst_offload_hdr_eth_destination_mac(TermOutput& termout, int format);
- bool write_bst_offload_hdr_eth_destination_mac(const char *data);
- bool read_bst_offload_hdr_ip_destination_address(TermOutput& termout, int format);
- bool write_bst_offload_hdr_ip_destination_address(const char *data);
- bool write_bst_offload_hdr_udp_destination_port(const char *data);
bool read_bst_offload_nof_beamlets_per_packet(TermOutput& termout, int format);
bool write_bst_offload_nof_beamlets_per_packet(const char *data);
@@ -133,11 +123,6 @@ private:
bool write_beamlet_output_scale(const char *data);
bool read_beamlet_output_nof_beamlets(TermOutput& termout, int format);
bool write_beamlet_output_nof_beamlets(const char *data);
- bool read_beamlet_output_hdr_eth_destination_mac(TermOutput& termout, int format);
- bool write_beamlet_output_hdr_eth_destination_mac(const char *data);
- bool read_beamlet_output_hdr_ip_destination_address(TermOutput& termout, int format);
- bool write_beamlet_output_hdr_ip_destination_address(const char *data);
- bool write_beamlet_output_hdr_udp_destination_port(const char *data);
bool read_xst_subband_select(TermOutput& termout, int format);
bool write_xst_subband_select(const char *data);
@@ -149,11 +134,12 @@ private:
bool write_xst_processing_enable(const char *data);
bool write_xst_offload_enable(const char *data);
bool write_xst_offload_nof_crosslets(const char *data);
- bool read_xst_offload_hdr_eth_destination_mac(TermOutput& termout, int format);
- bool write_xst_offload_hdr_eth_destination_mac(const char *data);
- bool read_xst_offload_hdr_ip_destination_address(TermOutput& termout, int format);
- bool write_xst_offload_hdr_ip_destination_address(const char *data);
- bool write_xst_offload_hdr_udp_destination_port(const char *data);
+
+ bool read_eth_destination_mac(TermOutput& termout, const std::string& port_name, const int n_instances, const int format);
+ bool write_eth_destination_mac(const char *data, const std::string& port_name, const int n_instances);
+ bool read_ip_destination_address(TermOutput& termout, const std::string& port_name, const int n_instances, const int format);
+ bool write_ip_destination_address(const char *data, const std::string& port_name, const int n_instances);
+ bool write_udp_destination_port(const char *data, const std::string& port_name, const int n_instances);
bool write_processing_enable(const char *data);
@@ -183,7 +169,7 @@ private:
bool write_signal_input_samples_delay(const char *data);
bool read_signal_input_mean(TermOutput& termout, int format, int mode);
bool read_signal_input_rms(TermOutput& termout, int format, int mode);
-
+ bool read_signal_input_data_buffer(TermOutput& termout, int format);
bool write_subband_weights(const char *data);
bool read_time_since_last_pps(TermOutput& termout, int format, int mode);