From 6ce09ca7f303c5210887e909e310bc59359d1393 Mon Sep 17 00:00:00 2001
From: Gijs Schoonderbeek <schoonderbeek@astron.nl>
Date: Tue, 25 May 2021 14:59:29 +0200
Subject: [PATCH] Ping FPGA, 10Mbit to pi

---
 spi_switch_Unb2c.py | 58 ++++++++++++++++++++++++++-------------------
 1 file changed, 33 insertions(+), 25 deletions(-)

diff --git a/spi_switch_Unb2c.py b/spi_switch_Unb2c.py
index 5f45ef8..e6febd6 100644
--- a/spi_switch_Unb2c.py
+++ b/spi_switch_Unb2c.py
@@ -95,7 +95,7 @@ def write_switch_bytes(page, addr, data):
         read_register(0xfe)
         read_register(addr)
 
-def read_link_status(ports=4):
+def read_link_status(ports=16):
     print("links status register")
     ret = read_switch(0x01,0x00, pr_stri=False)
     stri = "|15 |14 |13 |12 |11 |10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |"
@@ -206,32 +206,40 @@ if len(sys.argv) < 2:
     read_switch(0x01,0x70)
     read_link_status(4)
 elif sys.argv[1] == "stat":
-    read_link_status(4)
+    read_link_status(16)
 elif sys.argv[1] == "set":
-    print("write and read led register")
-    write_switch_bytes(0x00, 0x24, [0x20, 0x02]) #LSB first
-    read_switch(0x00,0x24)
-    print("write and read jumbo register")
-    write_switch_bytes(0x40, 0x01, [0xff, 0xff, 0x00, 0x00])
-    read_switch(0x40,0x01)
-    print("strap resistors")
-    read_switch(0x01,0x70)
+#b    print("write and read led register")
+#b    write_switch_bytes(0x00, 0x24, [0x20, 0x02]) #LSB first
+#b    read_switch(0x00,0x24)
+#nth    print("write and read jumbo register")
+#nth    write_switch_bytes(0x40, 0x01, [0xff, 0xff, 0x00, 0x00])
+#nth    read_switch(0x40,0x01)
+#b    print("strap resistors")
+#b    read_switch(0x01,0x70)
     if 1:
-        print("write and read SGMII register CH0")
-        write_switch_bytes(0x10, 0x24, [0x44, 0x00])
-        read_switch(0x10,0x24)
-        print("write and read SGMII register CH3")
-        write_switch_bytes(0x13, 0x24, [0x44, 0x00])
-        read_switch(0x13,0x24)
-        write_switch_bytes(0x0, 0x20, [0x06])
-        for cnt in range(16):
-            write_switch_bytes(0x0, 0x0+cnt, [0x00])
-        for cnt in range(4):
-            write_switch_bytes(0x80+cnt, 0x00, [0x00, 0x01])
-            ret = read_switch(0x80+cnt,0x00)
-    for cnt in range(16):
-        write_switch_bytes(0x10+cnt, 0x00, [0x40, 0x11])
-        write_switch_bytes(0x10+cnt, 0x20, [0xD0, 0x09])
+#        print("write and read SGMII register CH0, fifo size max")
+#        write_switch_bytes(0x10, 0x24, [0x44, 0x00])
+#        read_switch(0x10,0x24)
+#        print("write and read SGMII register CH3, fifo size max")
+#        write_switch_bytes(0x13, 0x24, [0x44, 0x00])
+#        read_switch(0x13,0x24)
+#        write_switch_bytes(0x0, 0x20, [0x06]) #Switch mode)
+#        for cnt in range(16):
+#            write_switch_bytes(0x0, 0x0+cnt, [0x00]) #Overwrite strapping resistor unmanaged mode
+        print("Set PHY ch 0 and read back to 10 Mbit 0x01 100Mbit 0x21")
+        write_switch_bytes(0x80+0, 0x00, [0x00, 0x01])
+#b        ret = read_switch(0x80,0x00)
+        print("Set PHY ch 1 and read back to 10 Mbit 0x01 100Mbit 0x21")
+        write_switch_bytes(0x00, 0x60+1, [0x8B])
+        write_switch_bytes(0x10+1, 0x00, [0x40, 0x11])
+        write_switch_bytes(0x80+1, 0x00, [0x40, 0x01])
+#1        write_switch_bytes(0x10+1, 0x00, [0x00, 0x01])
+#1        print("Set PHY ch 3 and read back to 10 Mbit 0x01 100Mbit 0x21")
+#1        write_switch_bytes(0x80+3, 0x00, [0x00, 0x01])
+#b        ret = read_switch(0x80+3,0x00)
+#1        write_switch_bytes(0x00, 0x86, [0xa0]) # no polling (make no difference)
+    for cnt in [15, 14, 13, 12, 11, 10, 9, 8]: #, 7, 6, 5, 4]:
+        write_switch_bytes(0x00, 0x60+cnt, [0x8B])
 
 else:
     print("spi_switch_Unb2c stat for status")
-- 
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