diff --git a/mdio.py b/mdio.py
new file mode 100644
index 0000000000000000000000000000000000000000..d3d022d20dd5136796641da413dadc44fb475ce1
--- /dev/null
+++ b/mdio.py
@@ -0,0 +1,77 @@
+# MDIO Interface to the ethernet Switch
+
+import RPi.GPIO as GPIO
+
+ClockPin =23
+DataPin = 22
+
+GPIO.setmode(GPIO.BCM)
+GPIO.setup = (ClockPin, GPIO.OUT)
+GPIO.setup = (DataPin, GPIO.OUT)
+
+# Preamble
+GPIO.output(DataPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.LOW)
+for preamble_cnt in range(32):
+    GPIO.output(ClockPin, GPIO.HIGH)
+    GPIO.output(ClockPin, GPIO.LOW)
+
+# Start of Frame
+GPIO.output(DataPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.LOW)
+GPIO.output(DataPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.HIGH)
+
+# Operant Write
+GPIO.output(DataPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.LOW)
+GPIO.output(DataPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.HIGH)
+
+# Phy address
+phy_addr = 0x1E
+phy_addr_bits = "{:0>5b}".format(phy_addr)
+for bit in phy_addr_bits:
+    if bit:
+        GPIO.output(DataPin, GPIO.HIGH)
+    else:
+        GPIO.output(DataPin, GPIO.LOW)
+    GPIO.output(ClockPin, GPIO.HIGH)
+    GPIO.output(ClockPin, GPIO.LOW)
+
+# phy reg
+phy_reg = 0x16
+phy_reg_bits = "{:0>5b}".format(phy_reg)
+for bit in phy_reg_bits:
+    if bit:
+        GPIO.output(DataPin, GPIO.HIGH)
+    else:
+        GPIO.output(DataPin, GPIO.LOW)
+    GPIO.output(ClockPin, GPIO.HIGH)
+    GPIO.output(ClockPin, GPIO.LOW)
+
+# TA
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.LOW)
+GPIO.output(ClockPin, GPIO.HIGH)
+GPIO.output(ClockPin, GPIO.LOW)
+
+#data
+phy_data = 0x16
+phy_data_bits = "{:0>16b}".format(phy_reg)
+for bit in phy_data_bits:
+    if bit:
+        GPIO.output(DataPin, GPIO.HIGH)
+    else:
+        GPIO.output(DataPin, GPIO.LOW)
+    GPIO.output(ClockPin, GPIO.HIGH)
+    GPIO.output(ClockPin, GPIO.LOW)
+
+
+
+
+GPIO.cleanup()
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