From d8ee6ed2366de29d70785e9d29a4ac364276fec7 Mon Sep 17 00:00:00 2001
From: kruger <kruger@astron.nl>
Date: Tue, 14 Feb 2023 10:36:13 +0000
Subject: [PATCH] L2TS updates

---
 pypcc/config/RECVTR_HB.yaml   | 24 +++++++++++++++---------
 pypcc/config/RECVTR_LB.yaml   | 14 +++++++++-----
 pypcc/i2cserv/hba1.py         | 14 ++++++++++----
 pypcc/i2cserv/i2c_array.py    |  2 ++
 pypcc/opcuaserv/yamlreader.py | 16 ++++++++++++++++
 5 files changed, 52 insertions(+), 18 deletions(-)

diff --git a/pypcc/config/RECVTR_HB.yaml b/pypcc/config/RECVTR_HB.yaml
index 026a0e3..0389d28 100644
--- a/pypcc/config/RECVTR_HB.yaml
+++ b/pypcc/config/RECVTR_HB.yaml
@@ -94,9 +94,9 @@ device_registers:
      description: Input/Ouput port 2
      address: [1,3]
      store: True
-   - name: DIR1
+   - name: POL1
      address: 4
-   - name: DIR2
+   - name: POL2
      address: 5
 
  - name: ROM
@@ -289,7 +289,7 @@ variables:
      driver: I2C_RCU
      devreg:  [IO1.GPIO1,IO1.GPIO2,IO2.GPIO1]
      bitoffset: [0,0,0]
-     width: 6
+     width: 5
      rw:  rw
      dtype: uint8
      dim: 96
@@ -538,7 +538,7 @@ variables:
      dtype: boolean
      dim: 96
      dim2: [3,32]
-     monitor: true
+#     monitor: true
      read_parallel: true
 
    - name: RCU_ADC_sync
@@ -672,7 +672,7 @@ variables:
      dim: 3072
      dim2: [32,96]
      mask: ANT_mask
-     wait: 100 #ms
+     wait: 1000
    - name: HBAT_PWR_LNA_on
      description: HBA frontend control
      driver: I2C_HBAT
@@ -684,7 +684,7 @@ variables:
      dim: 3072
      dim2: [32,96]
      mask: ANT_mask
-     wait: 100 #ms
+     wait: 1000
    - name: HBAT_PWR_on
      description: HBA frontend control
      driver: I2C_HBAT
@@ -697,7 +697,7 @@ variables:
      dim: 3072
      dim2: [32,96]
      mask: ANT_mask
-     wait: 100 #ms
+     wait: 1000
 
 methods:
   - name: RECVTR_Init #Called after startup to load. Should have all stored registers  
@@ -731,10 +731,18 @@ methods:
      - RECVTR_I2C_error: 0
      - RCU_PCB_version: Update
      - IO2.CONF1: 0x80 #Pgood on 0x80
+#     - IO1.POL1: 0
+#     - IO1.POL2: 0
+#     - IO2.POL1: 0
+#     - IO2.POL2: 0
+#     - IO4.POL1: 0
+#     - IO4.POL2: 0
      - IO2.GPIO1: 0x4A #0x40 Dig on, 0x0a =10dB att
      - IO2.GPIO2: 0x52 #0x09 #Band0 (or 0x12 or 0x24)  #LED green=on=low 0x40
 #     - IO3.GPIO1: 0xD5 #ADC_SDIO=high, clk=low, DTH_EN=high
 #     - IO3.GPIO2: 0xC7 #ADC SC=high, DTH_SDA=high
+     - IO3.POL1: 0
+     - IO3.POL2: 0
      - IO3.GPIO1: 0x15 #ADC_SDIO=high, clk=low, DTH_EN=low
      - IO3.GPIO2: 0x47 #ADC SC=high, DTH_SDA=high
      - IO1.GPIO1: 0x0A #0x0a = 10dB att
@@ -742,8 +750,6 @@ methods:
      - IO2.CONF2: 0
      - IO3.CONF1: 0
      - IO3.CONF2: 0
-     - IO3.DIR1: 0
-     - IO3.DIR2: 0
      - IO1.CONF1: 0
      - IO1.CONF2: 0
      - IO4.CONF1: 0xC0 #pin 0x40, 0x80 not used
diff --git a/pypcc/config/RECVTR_LB.yaml b/pypcc/config/RECVTR_LB.yaml
index 8d65ee1..995da15 100644
--- a/pypcc/config/RECVTR_LB.yaml
+++ b/pypcc/config/RECVTR_LB.yaml
@@ -79,9 +79,9 @@ device_registers:
      description: Input/Ouput port 2
      address: [1,3]
      store: True
-   - name: DIR1
+   - name: POL1
      address: 4
-   - name: DIR2
+   - name: POL2
      address: 5
 
  - name: ROM
@@ -243,7 +243,7 @@ variables:
      driver: I2C_RCU
      devreg:  [IO1.GPIO1,IO1.GPIO2,IO2.GPIO1]
      bitoffset: [0,0,0]
-     width: 6
+     width: 5
      rw:  rw
      dtype: uint8
      dim: 96
@@ -635,11 +635,15 @@ methods:
      - IO3.GPIO2: 0x47 #ADC SC=high, DTH_SDA=high, DTH_EN=low
      - IO1.GPIO1: 0x0A #0x0a = 10dB att
      - IO1.GPIO2: 0x8A #0x80 Analog on, 0x0a=10dB att
+#     - IO1.POL1: 0
+#     - IO1.POL2: 0
+#     - IO2.POL1: 0
+#     - IO2.POL2: 0
      - IO2.CONF2: 0
      - IO3.CONF1: 0
      - IO3.CONF2: 0
-     - IO3.DIR1: 0
-     - IO3.DIR2: 0
+     - IO3.POL1: 0
+     - IO3.POL2: 0
      - IO1.CONF1: 0
      - IO1.CONF2: 0
 #     - RCU_GPIO1: Update
diff --git a/pypcc/i2cserv/hba1.py b/pypcc/i2cserv/hba1.py
index 9ab8b63..65d1fe5 100644
--- a/pypcc/i2cserv/hba1.py
+++ b/pypcc/i2cserv/hba1.py
@@ -31,18 +31,24 @@ class hba1(hwdev):
        RCUmask=[(mask[i*3] | mask[i*3+1] | mask[i*3+2]) for i in range(32)]
 #       print(RCUmask)
        #Wait for PPS if required else wait a bit
+       self.conf['parentcls'].SetSwitchMask(RCUmask)
        if var1.get('wait')=="PPS":
          logging.info("HBA wait PPS")
-         self.conf['parentcls'].SetSwitchMask(RCUmask)
          channel=GPIO.wait_for_edge(self.pin,GPIO.RISING,timeout=1500)
          self.conf['parentcls'].i2csetget(self.addr,[self.reg])
          if channel is None:
            logging.warning("PPS not received!");
-         sleep(1.0)
+         sleep(2.0)
 #         return False;
        elif var1.get('wait'):
-         logging.debug("Wait %i ms",var1.get('wait')) 
-         sleep(var1['wait']/1000.)
+         self.conf['parentcls'].i2csetget(self.addr,[self.reg])
+         logging.debug("Wait %i ms",var1.get('wait'))
+         try:
+              sleep(float(var1.get('wait'))/1000.)
+         except:
+              logging.warning("HBAT1 wait not a number"+str((var1.get('wait'))));
+       else:
+         self.conf['parentcls'].i2csetget(self.addr,[self.reg])
        data,mask2=self.conf['parentcls'].GetVarValueMask(var1,mask)
        Data=OPCUAset(varid,InstType.varSet,data.copy(),mask2.copy())
        return [Data]
diff --git a/pypcc/i2cserv/i2c_array.py b/pypcc/i2cserv/i2c_array.py
index 7e66439..d1328ae 100644
--- a/pypcc/i2cserv/i2c_array.py
+++ b/pypcc/i2cserv/i2c_array.py
@@ -223,11 +223,13 @@ class i2c_array(i2c_dev):
                   if value1[i0] is None: 
                            #print(RCUi,'None')
                            self.enablemask[RCUi]=False;
+                           mask[RCUi*Step+Vari]=False
                            continue;
                   for x in range(Ncheck):
                         #print(RCUi,ord(check_val[x]),value1[i0+x])
                         if ord(check_val[x])!=value1[i0+x]:
                            self.enablemask[RCUi]=False;
+                           mask[RCUi*Step+Vari]=False
             logging.warn(str(("Identify RCUs:",check_val,self.enablemask)))
         return value1,mask
 
diff --git a/pypcc/opcuaserv/yamlreader.py b/pypcc/opcuaserv/yamlreader.py
index cfafea4..8ee6851 100644
--- a/pypcc/opcuaserv/yamlreader.py
+++ b/pypcc/opcuaserv/yamlreader.py
@@ -35,6 +35,18 @@ class yamlreader(yamlconfig):
         if self.statusid is None: return
         self.OPCset(self.statusid,[1],[])
 
+    def GetBusy(self):
+        if self.statusid is None: return False
+        v=self.conf['variables'][self.statusid];
+#        self.OPCset(self.statusid,[1],[])
+        var1=v.get('OPCR',None)
+        if var1 is None: var1=v.get('OPCW',None)
+        if var1 is None:
+           logging.warn("OPC variable not found!!");
+           return;
+        data3=var1.get_value();
+        return data3
+
     def AddVars(self,AddVarR,AddVarW):
      for v in self.conf['variables']:
 #        print(v)
@@ -277,6 +289,10 @@ class yamlreader(yamlconfig):
         self.timecount+=1;
 #        if self.statusOPC is None: self.statusOPC=self.conf['variables'][self.statusid].get('OPCR')
         while self.timecount>=T1:
+          if self.GetBusy():
+              logging.info("Busy, try monitor again in 1s")
+              self.timecount=T1-10; #busy, so try again in 1s
+              return;
           if not(self.statusOPC is None) and self.statusOPC.get_value(): return;
           if self.server.QoutLength()>0: return;
           v=self.conf['variables'][self.monitorvarcnt];
-- 
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