From d8d2b0a86b34d9dc3d7ec95904048c5e36d68117 Mon Sep 17 00:00:00 2001
From: kruger <kruger@astron.nl>
Date: Thu, 29 Apr 2021 13:35:30 +0200
Subject: [PATCH] I2C status added

---
 config/RCU.yaml       | 37 ++++++++++++--------------
 config/UNB2.yaml      | 60 +++++++++++++++++--------------------------
 i2cserv/i2c_array.py  | 18 ++++++-------
 i2cserv/i2c_array2.py |  4 ++-
 i2cserv/i2c_dev.py    |  7 ++---
 yamlconfig.py         |  4 +--
 6 files changed, 59 insertions(+), 71 deletions(-)

diff --git a/config/RCU.yaml b/config/RCU.yaml
index 102d7ff..a7bfc73 100644
--- a/config/RCU.yaml
+++ b/config/RCU.yaml
@@ -10,7 +10,7 @@ drivers:
    type: i2c_array #An array of similar devices connected to an I2C switch
    parent: I2C1
    parameters: [0,31] #start,number of RCUs
-   mask: RCU_I2C_OK
+   status: RCU_I2C_STATUS
  - name: I2C_HBAT
    type: hba1 #Special driver to manage HBAT1s.
    parent: I2C_RCU
@@ -200,18 +200,18 @@ variables:
      dtype: boolean
      dim: 32
 
-   - name: RCU_I2C_OK
-     description: Only OK RCUs are monitored
+   - name: RCU_I2C_STATUS
+     description: 0=Good, 1=No communication, 2=error
      driver: I2C_RCU
-     rw:  variable #server RW variable, not linked to IO
-     dtype: boolean
+     rw:  ro #server RW variable, not linked to IO
+     dtype: uint8
      mask: RCU_mask
      dim: 32
 
    - name: RCU_state
      description: State of RCUs 0=unknown, 1=ready, 2=busy, 3= wait PPS, 4=error
      driver: I2C_RCU
-     rw:  variable #server variable, not linked to IO
+     rw:  ro #server variable, not linked to IO
      dtype: uint8
      dim: 1
 
@@ -279,7 +279,7 @@ variables:
      dtype: double
      dim: 32
      monitor: true
-     mask: RCU_I2C_OK
+     mask: RCU_I2C_STATUS
 
    - name: RCU_Pwr_dig
      description: Enable LDOs
@@ -344,24 +344,23 @@ variables:
      rw:  ro
      dtype: uint8
      dim: 96
-     mask: RCU_I2C_OK
+     mask: RCU_I2C_STATUS
      monitor: true
 
-   - name: RCU_dth1_freq
-     driver: I2C_RCU
-     devreg:  [DTH1.Freq,DTH2.Freq,DTH3.Freq]
-     width: 32
-     rw:  rw
-     dtype: uint32
-     dim: 96
-     mask: Ant_mask
+#   - name: RCU_dth1_freq
+#     driver: I2C_RCU
+#     devreg:  [DTH1.Freq,DTH2.Freq,DTH3.Freq]
+#     width: 32
+#     rw:  rw
+#     dtype: uint32
+#     dim: 96
+#     mask: Ant_mask
 
 methods:
   - name: RCU_Init #Called after startup to load. Should have all stored registers  
     driver: I2C_RCU
     debug: True
     instructions:   
-    - RCU_state: 2
     - RCU_IO1_GPIO1: Update
     - RCU_IO1_GPIO2: Update
     - RCU_IO2_GPIO1: Update
@@ -375,13 +374,11 @@ methods:
 #    - IO3.GPIO2: Update
     - IO3.CONF1: Update
     - RCU_update: 0
-    - RCU_state: 1
 
   - name: RCU_on
     driver: I2C_RCU
     mask: RCU_mask
     instructions:
-     - RCU_state: 2
      - IO2.CONF1: 0    #Set device register, can also specify a register adress direction e.g. OIO2.0: 0
      - IO2.GPIO1: 0x4A
      - IO2.GPIO2: 0x55
@@ -402,7 +399,6 @@ methods:
 #     - ADC2_on: 0
 #     - WAIT: 500         #ms to wait
      - RCU_update: 0
-     - RCU_state: 1
 
   - name: RCU_update
     driver: I2C_RCU
@@ -445,6 +441,7 @@ methods:
   - name: RCU_HBAT_WAIT_PPS
     driver: I2C_RCU
     mask: RCU_mask
+    debug: True
     instructions:
      - RCU_state: 3
      - HB_UC_update.wait_pps : 1
diff --git a/config/UNB2.yaml b/config/UNB2.yaml
index 4d0374a..3ff6241 100644
--- a/config/UNB2.yaml
+++ b/config/UNB2.yaml
@@ -11,37 +11,37 @@ drivers:
    type: i2c_array
    parent: I2C1
    parameters: [0,1] 
-   mask: UNB2_I2C_bus_OK
+   status: UNB2_I2C_bus_STATUS
 
  - name: switch_PS
    type: i2c_array2 
    parent: I2C1
    parameters: [0,1,  4,4] 
-   mask: UNB2_I2C_bus_PS_OK
+   status: UNB2_I2C_bus_PS_STATUS
 
  - name: switch_FP
    type: i2c_array2 
    parent: I2C1
    parameters: [0,1,  5,5] 
-   mask: UNB2_I2C_bus_FP_OK
+   status: UNB2_I2C_bus_FP_STATUS
 
  - name: switch_QSFP 
    type: i2c_array2 #An array of similar devices connected to an I2C switch
    parent: I2C1
    parameters: [0,1,  0,3,  0,3, 6,7] #Parameters: APSCT_Switch, main switch, 2nd switch, 2nd switch
-   mask: UNB2_I2C_bus_QSFP_OK
+   status: UNB2_I2C_bus_QSFP_STATUS
 
  - name: switch_DDR4
    type: i2c_array2 
    parent: I2C1
    parameters: [0,1,  0,3,  4,4]
-   mask: UNB2_I2C_bus_DDR4_OK
+   status: UNB2_I2C_bus_DDR4_STATUS
 
  - name: switch_FPGA_PS
    type: i2c_array2 
    parent: I2C1
    parameters: [0,1,  0,3,  5,5] 
-   mask: UNB2_I2C_bus_FPGA_PS_OK
+   status: UNB2_I2C_bus_FPGA_PS_STATUS
 
  - name: GPIO
    type: gpio
@@ -87,36 +87,36 @@ device_registers:
 
 
 variables:
-#When I2C bus timeout, bus_OK set to False.  Can we set to True again to retry.
-   - name: UNB2_I2C_bus_OK
+#When I2C bus timeout, bus_STATUS set to False.  Can we set to True again to retry.
+   - name: UNB2_I2C_bus_STATUS
      driver: switch_UNB2
-     rw:  variable
-     dtype: boolean
+     rw:  ro
+     dtype: uint8
      dim: 2
-   - name: UNB2_I2C_bus_FP_OK
+   - name: UNB2_I2C_bus_FP_STATUS
      driver: switch_UNB2
      rw:  hidden
-     dtype: boolean
+     dtype: uint8
      dim: 2
-   - name: UNB2_I2C_bus_QSFP_OK
+   - name: UNB2_I2C_bus_QSFP_STATUS
      driver: switch_QSFP
-     rw:  variable
-     dtype: boolean
+     rw:  ro
+     dtype: uint8
      dim: 48
-   - name: UNB2_I2C_bus_DDR4_OK
+   - name: UNB2_I2C_bus_DDR4_STATUS
      driver: switch_QSFP
-     rw:  variable
-     dtype: boolean
+     rw:  ro
+     dtype: uint8
      dim: 8
-   - name: UNB2_I2C_bus_FPGA_PS_OK
+   - name: UNB2_I2C_bus_FPGA_PS_STATUS
      driver: switch_FPGA_PS
-     rw:  variable
-     dtype: boolean
+     rw:  ro
+     dtype: uint8
      dim: 8
-   - name: UNB2_I2C_bus_PS_OK
+   - name: UNB2_I2C_bus_PS_STATUS
      driver: switch_PS
-     rw:  variable
-     dtype: boolean
+     rw:  ro
+     dtype: uint8
      dim: 2
 
 ##Central MP for whole Uniboard2
@@ -154,7 +154,6 @@ variables:
 
    - name: UNB2_EEPROM_Unique_ID
      driver: switch_UNB2
-     mask: UNB2_I2C_bus_OK
      devreg: 0x50.0xFC
      width: 32
      rw:  ro
@@ -163,7 +162,6 @@ variables:
 
    - name: [UNB2_DC_DC_48V_12V_VIN,UNB2_DC_DC_48V_12V_VOUT,UNB2_DC_DC_48V_12V_IOUT,UNB2_DC_DC_48V_12V_TEMP]
      driver: switch_PS
-     mask: UNB2_I2C_bus_PS_OK
      devreg:  [0x2C.0x88,0x2C.0x8B,0x2C.0x8C,0x2C.0x8D]
      width: 16
      rw:  ro
@@ -174,7 +172,6 @@ variables:
 
    - name: [UNB2_POL_QSFP_N01_VOUT,UNB2_POL_QSFP_N01_IOUT,UNB2_POL_QSFP_N01_TEMP,UNB2_POL_QSFP_N23_VOUT,UNB2_POL_QSFP_N23_IOUT,UNB2_POL_QSFP_N23_TEMP]
      driver: switch_PS
-     mask: UNB2_I2C_bus_PS_OK
      devreg:  [0x2.0x8B,0x2.0x8C,0x2.0x8D,0x1.0x8B,0x1.0x8C,0x1.0x8D]
      width: 16
      rw:  ro
@@ -185,7 +182,6 @@ variables:
 
    - name: [UNB2_POL_SWITCH_1V2_VOUT,UNB2_POL_SWITCH_1V2_IOUT,UNB2_POL_SWITCH_1V2_TEMP,UNB2_POL_SWITCH_PHY_VOUT,UNB2_POL_SWITCH_PHY_IOUT,UNB2_POL_SWITCH_PHY_TEMP]
      driver: switch_PS
-     mask: UNB2_I2C_bus_PS_OK
      devreg:  [0xF.0x8B,0xF.0x8C,0xF.0x8D,0xE.0x8B,0xE.0x8C,0xE.0x8D]
      width: 16
      rw:  ro
@@ -196,7 +192,6 @@ variables:
 
    - name: [UNB2_POL_CLOCK_VOUT,UNB2_POL_CLOCK_IOUT,UNB2_POL_CLOCK_TEMP]
      driver: switch_PS
-     mask: UNB2_I2C_bus_PS_OK
      devreg:  [0xD.0x8B,0xD.0x8C,0xD.0x8D]
      width: 16
      rw:  ro
@@ -209,7 +204,6 @@ variables:
    - name: UNB2_FPGA_DDR4_SLOT_TEMP
      description: Signed I2C!
      driver: switch_DDR4
-     mask: UNB2_I2C_bus_DDR4_OK
      devreg:  [0x18.0x5,0x19.0x5]
      width: 13
      rw:  ro
@@ -220,7 +214,6 @@ variables:
 
    - name: UNB2_FPGA_DDR4_SLOT_PART_NUMBER
      driver: switch_DDR4
-     mask: UNB2_I2C_bus_DDR4_OK
      devreg:  [0x18.0x149,0x19.0x149]
      width: 160
      rw:  ro
@@ -230,7 +223,6 @@ variables:
 
    - name: [UNB2_POL_FPGA_CORE_VOUT,UNB2_FPGA_POL_CORE_IOUT,UNB2_FPGA_POL_CORE_TEMP,UNB2_FPGA_POL_ERAM_VOUT,UNB2_FPGA_POL_ERAM_IOUT,UNB2_FPGA_POL_ERAM_TEMP]
      driver: switch_FPGA_PS
-     mask: UNB2_I2C_bus_FGPA_PS_OK
      devreg:  [0x1.0x8B,0x1.0x8C,0x1.0x8D,0xD.0x8B,0xD.0x8C,0xD.0x8D]
      width: 16
      rw:  ro
@@ -241,7 +233,6 @@ variables:
 
    - name: [UNB2_FPGA_POL_RXGXB_VOUT,UNB2_FPGA_POL_RXGXB_IOUT,UNB2_FPGA_POL_RXGXB_TEMP,UNB2_FPGA_POL_TXGXB_VOUT,UNB2_FPGA_POL_TXGXB_IOUT,UNB2_POL_FPGA_TXGXB_TEMP]
      driver: switch_FPGA_PS
-     mask: UNB2_I2C_bus_FGPA_PS_OK
      devreg:  [0xE.0x8B,0xE.0x8C,0xE.0x8D,0xF.0x8B,0xF.0x8C,0xF.0x8D]
      width: 16
      rw:  ro
@@ -252,7 +243,6 @@ variables:
 
    - name: [UNB2_FPGA_POL_HGXB_VOUT,UNB2_FPGA_POL_HGXB_IOUT,UNB2_FPGA_POL_HGXB_TEMP,UNB2_FPGA_POL_PGM_VOUT,UNB2_FPGA_POL_PGM_IOUT,UNB2_FPGA_POL_PGM_TEMP]
      driver: switch_FPGA_PS
-     mask: UNB2_I2C_bus_FGPA_PS_OK
      devreg:  [0x10.0x8B,0x10.0x8C,0x10.0x8D,0x11.0x8B,0x11.0x8C,0x11.0x8D]
      width: 16
      rw:  ro
@@ -267,7 +257,6 @@ variables:
    - name: UNB2_FPGA_QSFP_CAGE_TEMP
      description: Signed I2C!
      driver: switch_QSFP
-     mask: UNB2_I2C_bus_QSFP_OK
      devreg:  0x50.0x16
      width: 16
      rw:  ro
@@ -279,7 +268,6 @@ variables:
    - name: UNB2_FPGA_QSFP_CAGE_LOS
      description: Bits for 4 TX, 4 RX channels
      driver: switch_QSFP
-     mask: UNB2_I2C_bus_QSFP_OK
      devreg:  0x50.0x03
      width: 8
      rw:  ro
diff --git a/i2cserv/i2c_array.py b/i2cserv/i2c_array.py
index e35cda1..60fed98 100644
--- a/i2cserv/i2c_array.py
+++ b/i2cserv/i2c_array.py
@@ -23,7 +23,7 @@ class i2c_array(i2c_dev):
         pars=config['parameters'];
         self.RCU_Switch1=range(pars[0],pars[1]+1);
         self.N=len(self.RCU_Switch1);
-        self.I2Cmask=[True]*self.N
+        self.I2Cmask=[0]*self.N
 
 #        self.devregs,RCU_storeReg=DevRegList(yaml)
 #        print("Init",config['name'],'len=',len(self.RCU_Switch1),' stored reg=',RCU_storeReg)
@@ -39,7 +39,7 @@ class i2c_array(i2c_dev):
     def SetSwitchMask(self,mask):
         m=0;
         for RCUi in range(self.N):
-           if (mask[RCUi]) and (self.I2Cmask[RCUi]): 
+           if (mask[RCUi]) and (self.I2Cmask[RCUi]==0): 
                m|=1<<self.RCU_Switch1[RCUi];
         self.conf['parentcls'].SetChannel(m);
 
@@ -62,7 +62,7 @@ class i2c_array(i2c_dev):
         for RCUi in range(self.N):
             for Vari in range(Step):
                 if not(mask[RCUi*Step+Vari]): continue
-                if not(self.I2Cmask[RCUi]):
+                if not(self.I2Cmask[RCUi]==0):
                   mask[RCUi*Step+Vari]=False;
                   continue;
                 i0=(RCUi*Step+    Vari)*Step2
@@ -74,14 +74,14 @@ class i2c_array(i2c_dev):
                 self.RCUi=RCUi;
                 res=self.SetVarValue(devreg,width,bitoffset,data[i0:i1])
                 if not(res):
-                  self.I2Cmask[RCUi]=res;
+                  self.I2Cmask[RCUi]=1;
                   mask[RCUi*Step+Vari]=False;
                   continue;
                 if getalso:
                   value2=value1[i0:i1]
                   res=self.GetVarValue(devreg,width,bitoffset,value2)
                   if not(res):
-                    self.I2Cmask[RCUi]=False;
+                    self.I2Cmask[RCUi]=1;
                     mask[RCUi*Step+Vari]=False;
                     continue;
                   value1[i0:i1]=value2
@@ -103,7 +103,7 @@ class i2c_array(i2c_dev):
         for RCUi in range(self.N):
             for Vari in range(Step):
                 if not(mask[RCUi*Step+Vari]): continue
-                if not(self.I2Cmask[RCUi]):
+                if not(self.I2Cmask[RCUi]==0):
                   mask[RCUi*Step+Vari]=False;
                   continue;
                 i0=(RCUi*Step+    Vari)*Step2
@@ -116,7 +116,7 @@ class i2c_array(i2c_dev):
                 self.RCUi=RCUi;
                 res=self.GetVarValue(devreg,width,bitoffset,value2)
                 if not(res):
-                  self.I2Cmask[RCUi]=False;
+                  self.I2Cmask[RCUi]=1;
                   mask[RCUi*Step+Vari]=False;
                   continue;
                 value1[i0:i1]=value2
@@ -137,7 +137,7 @@ class i2c_array(i2c_dev):
         if devreg.get('store'):
                 storearray=self.getstorearray(devreg);
                 for RCUi in range(self.N):
-                  if (mask[RCUi]) and (self.I2Cmask[RCUi]):   
+                  if (mask[RCUi]) and (self.I2Cmask[RCUi]==0):   
                       storearray[RCUi]=value[0]
                       self.RCUi=RCUi;
                 logging.debug(str(("Stored values:",self.getstorearray(devreg))))
@@ -152,7 +152,7 @@ class i2c_array(i2c_dev):
         i2c=self.conf['parentcls'];
         for RCUi in range(self.N):
                 if not(mask[RCUi]): continue
-                if not(self.I2Cmask[RCUi]): continue
+                if not(self.I2Cmask[RCUi]==0): continue
                 self.SetSwitch(RCUi);
                 value2=[value1[RCUi]]
                 self.RCUi=RCUi;
diff --git a/i2cserv/i2c_array2.py b/i2cserv/i2c_array2.py
index 29d5ec4..ef71eb3 100644
--- a/i2cserv/i2c_array2.py
+++ b/i2cserv/i2c_array2.py
@@ -1,11 +1,12 @@
 import logging
 from .i2c_array import i2c_array;
 from .hwdev import hwdev
+from .i2c_dev import i2c_dev
 
 
 class i2c_array2(i2c_array):
     def __init__(self,config):
-        hwdev.__init__(self,config);
+        i2c_dev.__init__(self,config);
 
 #       Make array of switch states
         pars=config['parameters'];
@@ -20,6 +21,7 @@ class i2c_array2(i2c_array):
         self.N=len(sw1)
         if len(sw2)>0: self.N*=len(sw2)
         if len(sw3)>0: self.N*=len(sw3)
+        self.I2Cmask=[0]*self.N
         self.sw1=[x for x in sw1 for i in range(self.N//len(sw1))]
         self.sw2=[x for x in sw2 for i in range(self.N//len(sw1)//len(sw2))]*len(sw1)
         self.sw3=[x for x in sw3]*len(sw1)*len(sw2)
diff --git a/i2cserv/i2c_dev.py b/i2cserv/i2c_dev.py
index ef0651f..cd86b72 100644
--- a/i2cserv/i2c_dev.py
+++ b/i2cserv/i2c_dev.py
@@ -84,12 +84,13 @@ def list_different(A,B):
 class i2c_dev(hwdev):
     def __init__(self,config):
         hwdev.__init__(self,config);
-        self.I2Cmask=[True]
+        self.I2Cmask=[0]
         self.I2Cmaskid=config.get('maskid',None)
         if self.I2Cmaskid is None: logging.warn(config['name']+" I2C mask not found!")
 
     def OPCUASetVariable(self,varid,var1,data,mask):
-       if var1['rw']=='variable':
+       logging.info(str(("Set Var",var1['name'],data,mask)))
+       if (var1['rw']=='variable') or not(var1.get('devreg')):
           if varid==self.I2Cmaskid:
               if len(mask)==0: mask=[True]*len(data);
               if len(data)!=len(mask): 
@@ -99,7 +100,6 @@ class i2c_dev(hwdev):
                 if m: self.I2Cmask[x]=data[x];
                 return [OPCUAset(self.I2Cmaskid,InstType.varSet,self.I2Cmask.copy(),[])]
           return [OPCUAset(varid,InstType.varSet,data,mask)];
-       logging.info(str(("Set Var",var1['name'],data,mask)))
        oldmask=self.I2Cmask.copy()
        data,mask2=self.SetGetVarValueMask(var1,data,mask);
 #       if len(mask)==len(mask2): mask[:]=mask2[:];
@@ -112,6 +112,7 @@ class i2c_dev(hwdev):
 
     def OPCUAReadVariable(self,varid,var1,mask):
       logging.info(str(("Read Var",var1['name'],mask)))
+      if not(var1.get('devreg')): return []
       #data=self.GetVarValueAll(var1)
       #else:             
       oldmask=self.I2Cmask.copy()
diff --git a/yamlconfig.py b/yamlconfig.py
index 171ab94..2114bb1 100644
--- a/yamlconfig.py
+++ b/yamlconfig.py
@@ -135,8 +135,8 @@ class yamlconfig():
                 D['devreg']=[self.getdevreg(devreg)]
 
         for D in drivers:
-            mask=D.get('mask');
-            if not(mask): continue;
+            mask=D.get('status');
+            if mask is None: continue;
             mask=self.getvarid(mask)
             if mask is None:
                 logging.warn("Variable %s not found",mask) 
-- 
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