diff --git a/clk/CLK.py b/clk/CLK.py
index f5a70f15e76b4c541adb251f65b0e79f1aaa94e7..f71fe4de5f2eb5a48b97611a38ea03ca938c289c 100644
--- a/clk/CLK.py
+++ b/clk/CLK.py
@@ -49,7 +49,8 @@ class RCU1():
self.N=number;
self.I2Ccallback=I2Ccallback
self.SWcallback=Switchcallback
- self.previous=np.zeros([number,Vars.RCU_storeReg],dtype='int')
+ self.previous =np.zeros([number,Vars.RCU_storeReg],dtype='int')
+ self.previousHBA=np.zeros([number,3,32],dtype='int')
def load(self):
Inst1=Vars.Instr(Vars.DevType.Instr,Vars.RCU_init,0,[]) #Read the current status of GPIO IOs
@@ -80,13 +81,13 @@ class RCU1():
if Instr.type==Vars.DevType.Instr:
#Execute instructions
Iset=Instr.dev;
- if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_data_value().Value.Value
+ if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_value()
for i in Iset.instr:
logging.debug(str(("Inst",i)))
self.SetVar(i,Mask=Mask)
return;
if Instr.type in [Vars.DevType.I2C,Vars.DevType.SPIbb,Vars.DevType.I2Cbb]:
- if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_data_value().Value.Value
+ if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_value()
mask=0;
RCU0=-1;
for RCUi in range(self.N):
@@ -112,7 +113,7 @@ class RCU1():
logging.error("Wrong size of value")
return False
if V1.Vars[0].type==Vars.DevType.Internal:
- Instr.dev.OPCW.get_data_value().Value.Value=Instr.value
+ Instr.dev.OPCW.set_value(Instr.value)
logging.debug("Update internal variable")
return
# if V1.Vars[0].type==Vars.DevType.Internal: return;
@@ -120,10 +121,10 @@ class RCU1():
Step2=int(V1.size/V1.nVars)
if (self.N>1):
Mask=(Vars.RCU_mask if Step==1 else Vars.Ant_mask)
- Mask=Mask.OPCW.get_data_value().Value.Value
- value1=strs2bytes(Instr.value) if V1.OPCR is None else strs2bytes(V1.OPCR.get_data_value().Value.Value)
+ Mask=Mask.OPCW.get_value()
+ value1=strs2bytes(Instr.value) if V1.OPCR is None else strs2bytes(V1.OPCR.get_value())
if (len(value1)==V1.nVars) and (self.N>1): value1=(value1*self.N);
- if (Instr.type==Vars.DevType.Var) or ((self.N==1) and (Instr.type==Vars.DevType.VarUpdate)):
+ if (Instr.type==Vars.DevType.Var):
logging.info(str(('** Set Var:',V1.name,value1)))
for RCUi in range(self.N):
for Vari in range(Step):
@@ -134,11 +135,22 @@ class RCU1():
value2=value1[i0:i1]
self.GetVarValue(RCUi,V1.Vars[Vari],value2)
value1[i0:i1]=value2
- if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
+ if not(V1.OPCR is None): V1.OPCR.set_value(bytes2strs(value1,Step2,V1.type))
+
elif Instr.type==Vars.DevType.VarUpdate:
- self.GetVarValueAll(V1,value1)
- if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
-# V1.OPCR.get_data_value().Value.Value=value1
+ if self.N==1:
+ for Vari in range(Step):
+ i0=(Vari)*Step2
+ i1=(Vari+1)*Step2
+ value2=value1[i0:i1]
+ self.GetVarValue(0,V1.Vars[Vari],value2)
+ value1[i0:i1]=value2
+ if not(V1.OPCR is None): V1.OPCR.set_value(bytes2strs(value1,Step2,V1.type))
+ else:
+ self.GetVarValueAll(V1,value1)
+# if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
+ if not(V1.OPCR is None): V1.OPCR.set_value(bytes2strs(value1,Step2,V1.type))
+# V1.OPCR.get_data_value().Value.Value=value1
logging.info(str(('** Readback:',V1.name,value1)))
@@ -147,13 +159,14 @@ class RCU1():
if var.type==Vars.DevType.I2C:
self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
self.GetI2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+ elif var.type==Vars.DevType.HBA1:
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+ self.GetI2CHBA1(RCUi,var.devreg,var.width,var.bitoffset,value)
elif var.type==Vars.DevType.I2Cbb:
logging.error("I2Cbb Implemented")
elif var.type==Vars.DevType.SPIbb:
self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
GetSPIbb(self.SetI2C,self.GetI2C,RCUi,var.devreg,value)
-# self.GetSPIBB(RCUi,var.devreg,var.width,var.bitoffset,value)
-# logging.error("SPIbb Implemented")
else:
logging.error("Not Implemented")
@@ -183,6 +196,22 @@ class RCU1():
elif V1.Vars[0].type==Vars.DevType.SPIbb:
self.GetBBValueAll(V1,value1,mask)
# logging.info("SPIbb all not implemented yet")
+ elif V1.Vars[0].type==Vars.DevType.HBA1:
+ for Vari in range(Step):
+ var=V1.Vars[Vari]
+ for RCUi in range(self.N):
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+# print(Step,Step2,len(value1),V1.size)
+ i0=(RCUi*Step+ Vari)*Step2
+ i1=(RCUi*Step+(Vari+1))*Step2
+ value2=value1[i0:i1]
+ self.GetI2CHBA1(RCUi,var.devreg,var.width,var.bitoffset,value2)
+ value1[i0:i1]=value2
+# i0=(RCUi*Step+ Vari)*Step2+16
+# i1=(RCUi*Step+(Vari+1))*Step2
+# value2=value1[i0:i1]
+# self.GetI2Cnoreg(RCUi,var.devreg,var.width,var.bitoffset,value2)
+# value1[i0:i1]=value2
else:
logging.error("Type not implemented")
# print(value1)
@@ -217,6 +246,10 @@ class RCU1():
if var.type==Vars.DevType.I2C:
self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
self.SetI2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+ elif var.type==Vars.DevType.HBA1:
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+ self.SetHBA1I2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+# print("RCU1 Set",RCUi,var,value)
elif var.type==Vars.DevType.I2Cbb:
logging.error("I2Cbb Implemented")
elif var.type==Vars.DevType.SPIbb:
@@ -234,6 +267,20 @@ class RCU1():
if buffer: return True;
return self.I2Ccallback(dev.Addr,value,reg=dev.Register_W)
+ def SetHBA1I2C(self,RCUi,dev,width,bitoffset,value,buffer=False):
+# if dev.store>0:
+ previous=self.previousHBA[RCUi,dev.store-1];
+ L=len(value)
+ for i in range(L):
+ value[i]=ApplyMask(value[i],width,bitoffset,previous[i]);
+ self.previousHBA[RCUi,dev.store-1]=value
+# if buffer: return True;
+ self.I2Ccallback(dev.Addr,value[:16],reg=dev.Register_W)
+ if L>16: self.I2Ccallback(dev.Addr,value[16:],reg=dev.Register_W+16)
+ self.I2Ccallback(dev.Addr,[500],reg=dev.Register_W,read=3) #Wait 500ms
+ return True
+# return self.I2Ccallback(dev.Addr,value,reg=dev.Register_W)
+
def GetI2Cbuffer(self,RCUi,dev,width,bitoffset,value):
if not(dev.store>0): return False;
value[0]=self.previous[RCUi,dev.store-1];
@@ -305,6 +352,20 @@ class RCU1():
#if (len(value)>1) and (width<8): print value
return True;
+ def GetI2CHBA1(self,RCUi,dev,width,bitoffset,value):
+ #print(width,len(value))
+ value2=value
+ reg=dev.Register_R
+ if not(self.I2Ccallback(dev.Addr,value2,read=1)): return False;
+ if value2[0] is None: return False
+ value[:]=value2[:];
+ if dev.store>0:
+ self.previousHBA[RCUi,dev.store-1]=value
+ for i in range(len(value)):
+ value[i]=UnMask(value[i],width,bitoffset)
+ return True;
+
+
def start(self,Q1):
def RCUthread(Q1):
while True:
@@ -318,13 +379,12 @@ class RCU1():
return RCUthread1
- def Queue_Monitor(self,Q1):
-# Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_temp,32,[0]*32)
-# Q1.put(Inst1)
+ def Queue_Monitor(self,Q1,NRCU):
+# Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_temp,NRCU,[0]*NRCU)
+# Q1.put(Inst1)
# Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_ADC_lock,96,[0]*96)
# Q1.put(Inst1)
- return
-
+ return
def AddVars(self,Q1,AddVarR,AddVarW):
for v in Vars.OPC_devvars:
dim1=Vars.RCU_MPaddr.nI2C*Vars.RCU_MPaddr.nSwitch*v.nVars
@@ -333,6 +393,7 @@ class RCU1():
#print(v.name,dim)
varvalue2=0
if v.type==Vars.datatype.dInt: varvalue2=dim2*[0]
+ elif v.type==Vars.datatype.dbool: varvalue2=dim2*[False]
elif v.type==Vars.datatype.dfloat: varvalue2=dim2*[0.0]
elif v.type==Vars.datatype.dstring: varvalue2=dim1*[" "*dim3]
print(len(varvalue2),varvalue2)
diff --git a/clk/HWconf.py b/clk/HWconf.py
index 36f14375ea723d11bb5ac124e893176503a0b13d..b975665baded666250e115e29c9a372c03a72852 100644
--- a/clk/HWconf.py
+++ b/clk/HWconf.py
@@ -14,6 +14,6 @@ RCU_storeReg=4; #Number of stored registers
-SPIBB_PLL=BBdev(4,[CLK_IO3_OUT1,CLK_IO3_OUT1,CLK_IO3_OUT1,CLK_IO3_OUT2],[4,7,5,6],0) #CLK,SDI,SDO,CS
+SPIBB_PLL=BBdev(4,[CLK_IO3_OUT1,CLK_IO3_OUT1,CLK_IO3_OUT1,CLK_IO3_OUT1],[4,7,5,6],0) #CLK,SDI,SDO,CS
CLK_PLL_lock =DevReg(SPIBB_PLL,0X00,0X00,0) # PLL locked status
diff --git a/clk/Vars.py b/clk/Vars.py
index 20c67abf5ded629feca9327cac797dc80d689ba6..7e4d4b02e5e8a06021fac03eacfc8abad5b0a01e 100644
--- a/clk/Vars.py
+++ b/clk/Vars.py
@@ -3,33 +3,38 @@ from .HWconf import *
CLKmod=I2Cmodules.CLK
-CLK_IGNORE_PPS= VarArray("CLK_Ignore_PPS",1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT1,1 ,6,1)],RW.ReadOnly,datatype.dInt,1,None,None)
-CLK_Enable_PWR= VarArray("CLK_Enable_PWR",1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT1,1 ,7,1)],RW.ReadOnly,datatype.dInt,1,None,None)
-CLK_Stat1 = VarArray("CLK_Stat" ,1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT1,1 ,4,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+CLK_IGNORE_PPS= VarArray("CLK_Ignore_PPS",1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT2,1 ,2,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+CLK_Enable_PWR= VarArray("CLK_Enable_PWR",1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT1,1 ,1,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+CLK_Stat1 = VarArray("CLK_Stat" ,1,[Var2dev("",CLKmod,DevType.I2C,CLK_IO3_OUT1,1 ,2,1)],RW.ReadOnly,datatype.dInt,1,None,None)
CLK_lock1 = VarArray("CLK_Lock" ,1,[Var2dev("",CLKmod,DevType.SPIbb,CLK_PLL_lock,8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
-OPC_devvars=[CLK_IGNORE_PPS,CLK_Enable_PWR,CLK_Stat1,CLK_lock1]
+OPC_devvars=[CLK_Enable_PWR,CLK_lock1]
RCU_init=Instrs("ReadRegisters",2,[
Instr(DevType.VarUpdate,CLK_IGNORE_PPS,1,[0]),
Instr(DevType.VarUpdate,CLK_Enable_PWR,1,[0])
])
-CLK_on=Instrs("CLK_on",2,[
+CLK_on=Instrs("CLK_on",3,[
Instr(DevType.I2C,CLK_IO3_CONF1,1,[0x2C]),
Instr(DevType.I2C,CLK_IO3_OUT1 ,1,[0x42]),
+ Instr(DevType.VarUpdate,CLK_lock1,1,[0]),
+ Instr(DevType.VarUpdate,CLK_Enable_PWR,1,[0])
])
-CLK_off=Instrs("CLK_off",2,[
+CLK_off=Instrs("CLK_off",3,[
Instr(DevType.I2C,CLK_IO3_CONF1,1,[0x2C]),
Instr(DevType.I2C,CLK_IO3_OUT1 ,1,[0x40]),
+ Instr(DevType.VarUpdate,CLK_Enable_PWR,1,[0])
])
def SPIinst(reg,value):
- return Instr(DevType.SPIbb,DevReg(SPIBB_PLL,0,reg,0),1,[value]),
-CLK_PLL_setup=Instrs("CLK_PLL_setup",2,[
- SPIinst(0x03,0x08),
+ return Instr(DevType.SPIbb,DevReg(SPIBB_PLL,0,reg,0),1,[value])
+
+CLK_PLL_setup=Instrs("CLK_PLL_setup",15,[
+# SPIinst(0x03,0x08),
+# Instr(DevType.I2C,CLK_IO3_CONF1,1,[0x2C]),
SPIinst(0x05,0x97),
SPIinst(0x06,0x10),
SPIinst(0x07,0x04),
@@ -41,7 +46,9 @@ CLK_PLL_setup=Instrs("CLK_PLL_setup",2,[
SPIinst(0x0D,0x01),#was 2
SPIinst(0x0F,0x01),
SPIinst(0x11,0x01),
- SPIinst(0x13,0x01)
+ SPIinst(0x13,0x01),
+ Instr(DevType.VarUpdate,CLK_lock1,1,[0])
])
+
OPC_methods=[CLK_on,CLK_off,CLK_PLL_setup]
diff --git a/clk/spibitbang2.py b/clk/spibitbang2.py
index d7d6be041507d88a6ffd8889cbf8c11a09885c75..d312d5b6560f7bfaaaa75a9cef2773bc9b636f71 100644
--- a/clk/spibitbang2.py
+++ b/clk/spibitbang2.py
@@ -27,11 +27,14 @@ def SetSPIbb(SetI2C,RCUi,dev,value):
bit_array = "{0:{fill}16b}".format(data2, fill='0')
# print(bit_array)
+ SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
SetI2C(RCUi,CSdev,1,CSpin,[0]) #enable
for bit in bit_array:
+ SetI2C(RCUi,CLKdev,1,CLKpin,[0])
SetI2C(RCUi,SDIdev,1,SDIpin,[int(bit)])
SetI2C(RCUi,CLKdev,1,CLKpin,[1])
- SetI2C(RCUi,CLKdev,1,CLKpin,[0])
+ SetI2C(RCUi,CLKdev,1,CLKpin,[0])#Why?
+ SetI2C(RCUi,CLKdev,1,CLKpin,[1])
SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
# SetI2C(RCUi,SDIdev,1,SDIpin,[1]) #high when finished
return True;
@@ -52,14 +55,15 @@ def GetSPIbb(SetI2C,GetI2C,RCUi,dev,value):
# ADC_rw = 0x01 # 0 for write, 1 for read
data = (ADC_reg_address << 1) + 1 #was 7??
+ SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
SetI2C(RCUi,CSdev,1,CSpin,[0]) #enable
bit_array = "{0:{fill}8b}".format(data, fill='0')
for bit in bit_array:
SetI2C(RCUi,SDIdev,1,SDIpin,[int(bit)])
- SetI2C(RCUi,CLKdev,1,CLKpin,[1])
SetI2C(RCUi,CLKdev,1,CLKpin,[0])
+ SetI2C(RCUi,CLKdev,1,CLKpin,[1])
# SetI2C(RCUi,SDIdev,1,SDIpin,[1]) #high when finished
@@ -69,10 +73,11 @@ def GetSPIbb(SetI2C,GetI2C,RCUi,dev,value):
ret_value=[0]
for i in range(N): value[i]=0
for cnt in range(8*(ADC_bytes+1)):
+ SetI2C(RCUi,CLKdev,1,CLKpin,[0])
+ SetI2C(RCUi,CLKdev,1,CLKpin,[1]) #read after rising
GetI2C(RCUi,SDOdev,1,SDOpin,ret_value)
for i in range(N): value[i]=(value[i]<<1)+ ret_value[i]
- SetI2C(RCUi,CLKdev,1,CLKpin,[1])
- SetI2C(RCUi,CLKdev,1,CLKpin,[0]) #read after falling edge
+ SetI2C(RCUi,CLKdev,1,CLKpin,[0])
SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
return True;
diff --git a/i2c/I2C.py b/i2c/I2C.py
index 108cee4b8db1c8627e8fdde009a3aa2a9da117c4..d3a60c9655f3b77cb094800511f99f5b6b41dd3b 100644
--- a/i2c/I2C.py
+++ b/i2c/I2C.py
@@ -10,13 +10,13 @@ import logging
I2Ccounter=0;
def I2C1server(addr,data,reg=None,read=0):
+# print("I2C",addr,reg,data,read)
try:
if read==3:
time.sleep(data[0]/1000.)
return True
logging.debug(str(("I2C",addr,reg,data,read)))
-# print("I2C",addr,reg,data,read)
# return True;
bus=pylibi2c.I2CDevice('/dev/i2c-1',addr)
if read==1:
@@ -25,6 +25,37 @@ def I2C1server(addr,data,reg=None,read=0):
if not(reg is None):
bus.ioctl_write(0,str(bytearray([reg])))
data[:]=[int(x) for x in bus.ioctl_read(0,length)]
+# print("I2C read",addr,reg,data,read)
+ else:
+ if reg is None:
+ bus.iaddr_bytes=0
+ reg=0;
+ bus.ioctl_write(reg,str(bytearray(data)))
+ bus.close()
+ return True;
+ except:
+ if bus: bus.close()
+# data[0]=0xff
+ return False;
+
+def I2C4server(addr,data,reg=None,read=0):
+# print("I2C4",addr,reg,data,read)
+ try:
+ if read==3:
+ time.sleep(data[0]/1000.)
+ return True
+ logging.debug(str(("I2C",addr,reg,data,read)))
+
+# print("I2C",addr,reg,data,read)
+# return True;
+ bus=pylibi2c.I2CDevice('/dev/i2c-4',addr)
+ if read==1:
+ length=len(data)
+ bus.iaddr_bytes=0
+ if not(reg is None):
+ bus.ioctl_write(0,str(bytearray([reg])))
+ data[:]=[int(x) for x in bus.ioctl_read(0,length)]
+# print(data)
else:
if reg is None:
bus.iaddr_bytes=0
@@ -63,6 +94,7 @@ def I2C2server(addr,data,reg=None,read=0):
return True;
except:
if bus: bus.close()
-# data[0]=0
+ print("I2C4 error")
+# data[0]=0xff
return False;
diff --git a/i2c/I2C.py.old b/i2c/I2C.py.old
new file mode 100644
index 0000000000000000000000000000000000000000..1982b43c9c0e13bf33d61d4bf48e8c2b940b5d06
--- /dev/null
+++ b/i2c/I2C.py.old
@@ -0,0 +1,70 @@
+import pylibi2c;
+import time
+import logging
+#bus = pylibi2c.I2CDevice('/dev/i2c-1'
+#read=0: write to register
+#read=1: read from register
+#read=2: write to register (common in group)
+#read=3: wait ms second
+I2Ccounter=0;
+
+def I2C1server(addr,data,reg=None,read=0):
+# print("I2C",addr,reg,data,read)
+ try:
+ if read==3:
+ time.sleep(data[0]/1000.)
+ return True
+ logging.debug(str(("I2C",addr,reg,data,read)))
+
+# return True;
+ bus=pylibi2c.I2CDevice('/dev/i2c-1',addr)
+ if read==1:
+ length=len(data)
+ bus.iaddr_bytes=0
+ if not(reg is None):
+ bus.ioctl_write(0,str(bytearray([reg])))
+ data[:]=[int(x) for x in bus.ioctl_read(0,length)]
+# print("I2C read",addr,reg,data,read)
+ else:
+ if reg is None:
+ bus.iaddr_bytes=0
+ reg=0;
+ bus.ioctl_write(reg,str(bytearray(data)))
+ bus.close()
+ return True;
+ except:
+ if bus: bus.close()
+# data[0]=0xff
+ return False;
+
+def I2C4server(addr,data,reg=None,read=0):
+# print("I2C4",addr,reg,data,read)
+ try:
+ if read==3:
+ time.sleep(data[0]/1000.)
+ return True
+ logging.debug(str(("I2C",addr,reg,data,read)))
+
+# print("I2C",addr,reg,data,read)
+# return True;
+ bus=pylibi2c.I2CDevice('/dev/i2c-4',addr)
+ if read==1:
+ length=len(data)
+ bus.iaddr_bytes=0
+ if not(reg is None):
+ bus.ioctl_write(0,str(bytearray([reg])))
+ data[:]=[int(x) for x in bus.ioctl_read(0,length)]
+# print(data)
+ else:
+ if reg is None:
+ bus.iaddr_bytes=0
+ reg=0;
+ bus.ioctl_write(reg,str(bytearray(data)))
+ bus.close()
+ return True;
+ except:
+ if bus: bus.close()
+ print("I2C4 error")
+# data[0]=0xff
+ return False;
+
diff --git a/i2c/I2C_dummy.py b/i2c/I2C_dummy.py
index d6351b08d07e2271ddae4ff7d15c527bf8ac1649..ba39c1a5d6e1df962bc6f5e1eab79140cd5ec122 100644
--- a/i2c/I2C_dummy.py
+++ b/i2c/I2C_dummy.py
@@ -20,9 +20,9 @@ def I2C1server(addr,data,reg=None,read=0):
# logging.debug(str(("I2C",addr,reg,data,read)))
return True
-def I2C2server(addr,data,reg=None,read=0):
+def I2C4server(addr,data,reg=None,read=0):
global I2Ccounter;
- logging.debug(str(("I2C2",addr,reg,data,read)))
+ logging.debug(str(("I2C4",addr,reg,data,read)))
if read==3:
time.sleep(data[0]/1000.)
return True
diff --git a/i2c/I2Cswitch1.py b/i2c/I2Cswitch1.py
index 50a72c6cdb195c9f0f2efff6848e4d36b2d52d1d..187456b1d6cc9eb2d15330d216ff89e72fe42a18 100644
--- a/i2c/I2Cswitch1.py
+++ b/i2c/I2Cswitch1.py
@@ -16,8 +16,6 @@ class I2Cswitch1():
def I2Ccallback(self,RCU,addr,data,reg=None,read=0):
self.callback1(addr,data,reg,read)
-
-
class I2Cswitch0():
def __init__(self,callback1):
return
diff --git a/i2c/I2Cv2.py b/i2c/I2Cv2.py
new file mode 100644
index 0000000000000000000000000000000000000000..1627b362488d3a250654c41856f4ecfe1baa41ad
--- /dev/null
+++ b/i2c/I2Cv2.py
@@ -0,0 +1,62 @@
+#import pylibi2c;
+#import
+from periphery import I2C;
+
+import time
+import logging
+#bus = pylibi2c.I2CDevice('/dev/i2c-1'
+#read=0: write to register
+#read=1: read from register
+#read=2: write to register (common in group)
+#read=3: wait ms second
+I2Ccounter=0;
+
+
+i2c1=I2C("/dev/i2c-1")
+
+def I2C1server(addr,data,reg=None,read=0):
+# print("I2C",addr,reg,data,read)
+ try:
+ if read==3:
+ time.sleep(data[0]/1000.)
+ return True
+ logging.debug(str(("I2C",addr,reg,data,read)))
+ if read==1:
+ if not(reg is None): i2c1.transfer(addr,[I2C.Message([reg])])
+ msgs=[I2C.Message(data,read=True)]
+ i2c1.transfer(addr,msgs)
+ data[:]=msgs[0].data
+ else:
+ if reg is None:
+ msgs=[I2C.Message(data)]
+ else:
+ msgs=[I2C.Message([reg]+data)]
+ i2c1.transfer(addr,msgs)
+ return True;
+ except:
+ return False;
+
+i2c4=I2C("/dev/i2c-4")
+
+def I2C4server(addr,data,reg=None,read=0):
+# print("I2C",addr,reg,data,read)
+ try:
+ if read==3:
+ time.sleep(data[0]/1000.)
+ return True
+ logging.debug(str(("I2C",addr,reg,data,read)))
+
+ if read==1:
+ if not(reg is None): i2c4.transfer(addr,[I2C.Message([reg])])
+ msgs=[I2C.Message(data,read=True)]
+ i2c4.transfer(addr,msgs)
+ data[:]=msgs[0].data
+ else:
+ if reg is None:
+ msgs=[I2C.Message(data)]
+ else:
+ msgs=[I2C.Message([reg]+data)]
+ i2c4.transfer(addr,msgs)
+ return True;
+ except:
+ return False;
diff --git a/i2c/setswitch.py b/i2c/setswitch.py
new file mode 100644
index 0000000000000000000000000000000000000000..45f43942a9b3dc1fc7cde1b4efa5a06b674bde92
--- /dev/null
+++ b/i2c/setswitch.py
@@ -0,0 +1,36 @@
+from I2C import *
+import time
+RCU=3
+Ver="RCU2H v0.2"
+R1=0
+ROM=0x50
+
+#Set switch
+print("Set switch")
+if not(I2C1server(0x70,[1<<RCU],reg=None,read=0)):
+ print("Error setting switch!")
+ exit() #select RCU
+exit()
+#Get ID
+print("Get ID")
+ID=[0]*4
+if not(I2C1server(ROM,ID,reg=0xFC,read=1)): exit() #select RCU
+print(ID)
+exit()
+
+#Upload version
+Ver2=[(c.encode('utf-8')[0]) for c in Ver]
+print(len(Ver),Ver,Ver2)
+V2=[0]
+for i,v in enumerate(Ver2):
+ time.sleep(0.1)
+ I2C1server(ROM,[v],reg=R1+i,read=0) #select RCU
+# I2C1server(ROM,[v],reg=None,read=0) #select RCU
+ time.sleep(0.1)
+ I2C1server(ROM,V2,reg=R1+i,read=1) #select RCU
+ print(i,v,V2)
+
+#Download version
+Ver2=[0]*10
+I2C1server(ROM,Ver2,reg=R1,read=1) #select RCU
+print(Ver2)
diff --git a/i2c/test.py b/i2c/test.py
new file mode 100644
index 0000000000000000000000000000000000000000..92ee093a8b833322558341cd664855f643f57dd1
--- /dev/null
+++ b/i2c/test.py
@@ -0,0 +1,37 @@
+from I2C import *
+import time
+RCU=1
+Ver="RCU2H v0.2"
+R1=0
+ROM=0x50
+
+ID=[0]*7
+I2C1server(0x20,ID,reg=2,read=1)
+print(ID)
+I2C1server(0x20,ID,reg=2,read=1)
+print(ID)
+exit()
+#0=0
+#1=0 #debug?
+#2=21 #spd1
+#3=7 #spd2
+#4=175 #TXspeed
+#5=0
+#6=0
+
+#Upload version
+Ver2=[(c.encode('utf-8')[0]) for c in Ver]
+print(len(Ver),Ver,Ver2)
+V2=[0]
+for i,v in enumerate(Ver2):
+ time.sleep(0.1)
+ I2C1server(ROM,[v],reg=R1+i,read=0) #select RCU
+# I2C1server(ROM,[v],reg=None,read=0) #select RCU
+ time.sleep(0.1)
+ I2C1server(ROM,V2,reg=R1+i,read=1) #select RCU
+ print(i,v,V2)
+
+#Download version
+Ver2=[0]*10
+I2C1server(ROM,Ver2,reg=R1,read=1) #select RCU
+print(Ver2)
diff --git a/pcctypes.py b/pcctypes.py
index 1450ec4701ec6f76d6a96a1141b592e874666fc2..56c4bc7da636ed670e6d4bfcfc69adda86a663d8 100644
--- a/pcctypes.py
+++ b/pcctypes.py
@@ -35,6 +35,7 @@ class DevType(Enum):
Internal = 6
HBA1 = 7
HBA2 = 8
+ Wait = 9
class RW(Enum):
Hidden = 0 #Not an OPC_UA variable
@@ -46,6 +47,7 @@ class datatype(Enum):
dInt = 0
dfloat = 1
dstring = 2
+ dbool = 3
#Variable two device link
Var2dev=namedtuple("Var2dev","name module type devreg width bitoffset Scale")
diff --git a/pypcc2.py b/pypcc2.py
index 9907c49deb224044a780d1129cb57f5b7c6bbf56..4c873a2909dcd12b887880178b0738adfef8aec3 100644
--- a/pypcc2.py
+++ b/pypcc2.py
@@ -14,6 +14,8 @@ import time
import logging
import argparse
+NRCU=32
+
parser = argparse.ArgumentParser()
parser.add_argument("-s", "--simulator", help="Do not connect to I2c, but simulate behaviour.", action="store_true")
parser.add_argument("-p", "--port", help="Port number to listen on [%(default)s].", type=int, default=4842)
@@ -31,6 +33,7 @@ if args.simulator:
from i2c import I2C_dummy as I2C
else:
from i2c import I2C
+# from i2c import I2Cv2 as I2C
#Queue used to pass instructions from opc-ua server to RCU
Q1=queue.Queue() #RCUs
@@ -41,14 +44,14 @@ opcuaserv.InitServer(port=args.port)
logging.info("OPC-UA Server started")
SW1=I2Cswitch1.I2Cswitch1(I2C.I2C1server)
-SW0=I2Cswitch1.I2Cswitch0(I2C.I2C2server) #Dummy switch as their is no switch on LTS
+SW0=I2Cswitch1.I2Cswitch0(None) #Dummy switch as their is no switch on LTS
-RCU=RCU.RCU1(32,I2C.I2C1server,SW1.SetChannel)
-RCU.AddVars(Q1,opcuaserv.AddVarR,opcuaserv.AddVarW)
+RCU=RCU.RCU1(NRCU,I2C.I2C1server,SW1.SetChannel)
+RCU.AddVars(Q1,opcuaserv.AddVarR,opcuaserv.AddVarW,opcuaserv.AddVar)
RCU.AddMethod(Q1,opcuaserv.Addmethod)
RCU.load() #Load current register values from HW
-CLK=CLK.RCU1(1,I2C.I2C2server,SW0.SetChannel)
+CLK=CLK.RCU1(1,I2C.I2C4server,SW0.SetChannel)
CLK.AddVars(Q2,opcuaserv.AddVarR,opcuaserv.AddVarW)
CLK.AddMethod(Q2,opcuaserv.Addmethod)
CLK.load() #Load current register values from HW
@@ -76,7 +79,7 @@ def TimerThread(Q1,RCU):
if Q1.qsize()>3: continue;
cnt=0;
logging.debug(str(("I2C bytes=",I2C.I2Ccounter," Qlength=",Q1.qsize())))
- RCU.Queue_Monitor(Q1)
+ RCU.Queue_Monitor(Q1,NRCU)
logging.info("End Timer thread")
@@ -104,5 +107,5 @@ finally:
logging.info("Stop OPC-UA server")
opcuaserv.server.stop()
RCUthread1.join()
-# CLKthread1.join()
+ CLKthread1.join()
Timerthread1.join()
diff --git a/rcu/HWconf.py b/rcu/HWconf.py
index 8f9323da309bfa5e3fc21896738e93c3592e4240..44b75df15fe7bc8caef46d1986a452fe154e5703 100644
--- a/rcu/HWconf.py
+++ b/rcu/HWconf.py
@@ -4,6 +4,8 @@ from pcctypes import *
#Mid plane address
#MPaddr=namedtuple("MPaddr","nI2C I2C nSwitch Switch");
RCU_MPaddr=MPaddr(1,[1],32,[0,1,2,3,4,5,6,7,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5])
+#RCU_MPaddr=MPaddr(1,[1],2,[0,1])
+#RCU_MPaddr=MPaddr(1,[1],1,[0])
#CLK_MPaddr=MPaddr(1,[1],1,[7])
#DevReg=namedtuple("DevReg","Addr Register_R Register_W store");
@@ -40,9 +42,10 @@ RCU_AN_Ch2=DevReg(0x14,0xB180,-1,0)
RCU_AN_Temp=DevReg(0x14,0xA0C0,-1,0)
#HBA1
-RCU_HBA1=DevReg(0x41,0,0,1)
-RCU_HBA2=DevReg(0x42,0,0,2)
-RCU_HBA3=DevReg(0x43,0,0,3)
+RCU_HBA1=DevReg(0x41,0x10,0x10,1)
+RCU_HBA2=DevReg(0x42,0x10,0x10,2)
+RCU_HBA3=DevReg(0x43,0x10,0x10,3)
+
RCU_ROM_ID =DevReg(0x50,0xfc,0xfc,0) #32 bit ID=4 bytes
@@ -60,18 +63,21 @@ SPIBB_ADC3=BBdev(4,[RCU_IO3_OUT1,RCU_IO3_OUT1,RCU_IO3_CONF1,RCU_IO3_OUT2],[5,4,4
#SPI ADC
#Dev: AD9683
RCU_ADC1_PLL_stat =DevReg(SPIBB_ADC1,0X0A,0X0A,0) # PLL locked status
+RCU_ADC1_PLL_enc =DevReg(SPIBB_ADC1,0X21,0X21,0) # PLL low encode
RCU_ADC1_JESD_ctr =DevReg(SPIBB_ADC1,0X5F,0X5F,0) #JESD link control, ILAS mode
RCU_ADC1_CML_level=DevReg(SPIBB_ADC1,0X15,0X15,0) #CML output adjust
RCU_ADC1_SYNC_ctr =DevReg(SPIBB_ADC1,0X3A,0X3A,0) #SYNC / SYSREF control
RCU_ADC1_update =DevReg(SPIBB_ADC1,0XFF,0xFF,0) # Global device update
RCU_ADC2_PLL_stat =DevReg(SPIBB_ADC2,0X0A,0X0A,0) # PLL locked status
+RCU_ADC2_PLL_enc =DevReg(SPIBB_ADC2,0X21,0X21,0) # PLL low encode
RCU_ADC2_JESD_ctr =DevReg(SPIBB_ADC2,0X5F,0X5F,0) #JESD link control, ILAS mode
RCU_ADC2_CML_level=DevReg(SPIBB_ADC2,0X15,0X15,0) #CML output adjust
RCU_ADC2_SYNC_ctr =DevReg(SPIBB_ADC2,0X3A,0X3A,0) #SYNC / SYSREF control
RCU_ADC2_update =DevReg(SPIBB_ADC2,0XFF,0xFF,0) # Global device update
RCU_ADC3_PLL_stat =DevReg(SPIBB_ADC3,0X0A,0X0A,0) # PLL locked status
+RCU_ADC3_PLL_enc =DevReg(SPIBB_ADC3,0X21,0X21,0) # PLL low encode
RCU_ADC3_JESD_ctr =DevReg(SPIBB_ADC3,0X5F,0X5F,0) #JESD link control, ILAS mode
RCU_ADC3_CML_level=DevReg(SPIBB_ADC3,0X15,0X15,0) #CML output adjust
RCU_ADC3_SYNC_ctr =DevReg(SPIBB_ADC3,0X3A,0X3A,0) #SYNC / SYSREF control
diff --git a/rcu/RCU.py b/rcu/RCU.py
index 2c0511a932f9d4796f9cf18ec2c8d1a41ca56d9d..98978660f16f68fa5f3d0a07de694fb1305b2e2d 100644
--- a/rcu/RCU.py
+++ b/rcu/RCU.py
@@ -3,6 +3,7 @@ import numpy as np
import logging
from .spibitbang1 import *
import threading
+import time
def ApplyMask(value,width=8,bitoffset=0,previous=0):
@@ -49,7 +50,8 @@ class RCU1():
self.N=number;
self.I2Ccallback=I2Ccallback
self.SWcallback=Switchcallback
- self.previous=np.zeros([number,Vars.RCU_storeReg],dtype='int')
+ self.previous =np.zeros([number,Vars.RCU_storeReg],dtype='int')
+ self.previousHBA=np.zeros([number,3,32],dtype='int')
def load(self):
Inst1=Vars.Instr(Vars.DevType.Instr,Vars.RCU_init,0,[]) #Read the current status of GPIO IOs
@@ -76,16 +78,20 @@ class RCU1():
def SetVar(self,Instr,Mask=[]):
# Instr.value=strs2bytes(Instr.value) #Alwast be an array of bytes
+ if Instr.type==Vars.DevType.Wait:
+# time.sleep(Instr.value[0]/1000.)
+ print("Sleep",Instr.value[0]/1000.,"s")
+ return;
if Instr.type==Vars.DevType.Instr:
#Execute instructions
Iset=Instr.dev;
- if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_data_value().Value.Value
+ if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_value()
for i in Iset.instr:
logging.debug(str(("Inst",i)))
self.SetVar(i,Mask=Mask)
return;
if Instr.type in [Vars.DevType.I2C,Vars.DevType.SPIbb,Vars.DevType.I2Cbb]:
- if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_data_value().Value.Value
+ if len(Mask)==0: Mask=Vars.RCU_mask.OPCW.get_value()
mask=0;
RCU0=-1;
for RCUi in range(self.N):
@@ -107,19 +113,20 @@ class RCU1():
# self.SetI2C(RCUi,Instr.dev,8,0,strs2bytes(Instr.value))
return;
V1=Instr.dev
+# print(Instr.nvalue,V1.nVars,V1.size)
if not((Instr.nvalue==V1.nVars) and (Instr.type==Vars.DevType.VarUpdate)) and not(Instr.nvalue==V1.size*self.N):
logging.error("Wrong size of value")
return False
if V1.Vars[0].type==Vars.DevType.Internal:
- Instr.dev.OPCW.get_data_value().Value.Value=Instr.value
+ Instr.dev.OPCW.set_value(Instr.value)
logging.debug("Update internal variable")
return
# if V1.Vars[0].type==Vars.DevType.Internal: return;
Step=V1.nVars
Step2=int(V1.size/V1.nVars)
Mask=(Vars.RCU_mask if Step==1 else Vars.Ant_mask)
- Mask=Mask.OPCW.get_data_value().Value.Value
- value1=strs2bytes(Instr.value) if V1.OPCR is None else strs2bytes(V1.OPCR.get_data_value().Value.Value)
+ Mask=Mask.OPCW.get_value()
+ value1=strs2bytes(Instr.value) if V1.OPCR is None else strs2bytes(V1.OPCR.get_value())
if (len(value1)==V1.nVars) and (self.N>1): value1=(value1*self.N);
if Instr.type==Vars.DevType.Var:
logging.info(str(('** Set Var:',V1.name,value1)))
@@ -132,11 +139,12 @@ class RCU1():
value2=value1[i0:i1]
self.GetVarValue(RCUi,V1.Vars[Vari],value2)
value1[i0:i1]=value2
- if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
+ if not(V1.OPCR is None): V1.OPCR.set_value(bytes2strs(value1,Step2,V1.type))
elif Instr.type==Vars.DevType.VarUpdate:
self.GetVarValueAll(V1,value1)
- if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
+# if not(V1.OPCR is None): V1.OPCR.get_data_value().Value.Value=bytes2strs(value1,Step2,V1.type)
+ if not(V1.OPCR is None): V1.OPCR.set_value(bytes2strs(value1,Step2,V1.type))
# V1.OPCR.get_data_value().Value.Value=value1
logging.info(str(('** Readback:',V1.name,value1)))
@@ -146,6 +154,9 @@ class RCU1():
if var.type==Vars.DevType.I2C:
self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
self.GetI2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+ elif var.type==Vars.DevType.HBA1:
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+ self.GetI2CHBA1(RCUi,var.devreg,var.width,var.bitoffset,value)
elif var.type==Vars.DevType.I2Cbb:
logging.error("I2Cbb Implemented")
elif var.type==Vars.DevType.SPIbb:
@@ -179,6 +190,27 @@ class RCU1():
elif V1.Vars[0].type==Vars.DevType.SPIbb:
self.GetBBValueAll(V1,value1,mask)
# logging.info("SPIbb all not implemented yet")
+ elif V1.Vars[0].type==Vars.DevType.HBA1:
+ for Vari in range(Step):
+ var=V1.Vars[Vari]
+# self.SWcallback(mask)
+# self.SetI2CAddr(self,DevReg)
+ for RCUi in range(self.N):
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+# print(Step,Step2,len(value1),V1.size)
+ WX=[0]
+ self.I2Ccallback(0x40,WX,reg=0,read=1)#wakeup, do nothing
+ self.I2Ccallback(0x40,[10],read=3)
+ i0=(RCUi*Step+ Vari)*Step2
+ i1=(RCUi*Step+(Vari+1))*Step2
+ value2=value1[i0:i1]
+ self.GetI2CHBA1(RCUi,var.devreg,var.width,var.bitoffset,value2)
+ value1[i0:i1]=value2
+# i0=(RCUi*Step+ Vari)*Step2+16
+# i1=(RCUi*Step+(Vari+1))*Step2
+# value2=value1[i0:i1]
+# self.GetI2Cnoreg(RCUi,var.devreg,var.width,var.bitoffset,value2)
+# value1[i0:i1]=value2
else:
logging.error("Type not implemented")
# print(value1)
@@ -213,6 +245,10 @@ class RCU1():
if var.type==Vars.DevType.I2C:
self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
self.SetI2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+ elif var.type==Vars.DevType.HBA1:
+ self.SWcallback(1<<Vars.RCU_MPaddr.Switch[RCUi])
+ self.SetHBA1I2C(RCUi,var.devreg,var.width,var.bitoffset,value)
+# print("RCU1 Set",RCUi,var,value)
elif var.type==Vars.DevType.I2Cbb:
logging.error("I2Cbb Implemented")
elif var.type==Vars.DevType.SPIbb:
@@ -230,6 +266,26 @@ class RCU1():
if buffer: return True;
return self.I2Ccallback(dev.Addr,value,reg=dev.Register_W)
+ def SetHBA1I2C(self,RCUi,dev,width,bitoffset,value,buffer=False):
+# if dev.store>0:
+ previous=self.previousHBA[RCUi,dev.store-1];
+ L=len(value)
+ for i in range(L):
+ value[i]=ApplyMask(value[i],width,bitoffset,previous[i]);
+ self.previousHBA[RCUi,dev.store-1]=value
+# if buffer: return True;
+ print("HBA set:",value);
+ XX=[0]
+ self.I2Ccallback(0x40,XX,reg=0,read=1)#wakeup, do nothing
+ self.I2Ccallback(dev.Addr,[10],read=3)
+ self.I2Ccallback(dev.Addr,value[:16],reg=dev.Register_W)
+ if L>16:
+ self.I2Ccallback(dev.Addr,[10],read=3)
+ self.I2Ccallback(dev.Addr,value[16:],reg=dev.Register_W+16)
+ self.I2Ccallback(dev.Addr,[600],read=3) #Wait 500ms
+ return True
+# return self.I2Ccallback(dev.Addr,value,reg=dev.Register_W)
+
def GetI2Cbuffer(self,RCUi,dev,width,bitoffset,value):
if not(dev.store>0): return False;
value[0]=self.previous[RCUi,dev.store-1];
@@ -301,12 +357,30 @@ class RCU1():
#if (len(value)>1) and (width<8): print value
return True;
+ def GetI2CHBA1(self,RCUi,dev,width,bitoffset,value):
+ #print(width,len(value))
+ value2=value
+ reg=dev.Register_R
+# if not(self.I2Ccallback(dev.Addr,[],reg=0x0)): return False;
+ if not(self.I2Ccallback(dev.Addr,value2,read=1)): return False;
+ if value2[0] is None: return False
+ value[:]=value2[:];
+ print("HBA ",RCUi,dev.Addr," received:",value);
+# if dev.store>0: #This is disabled due to noise on readback
+# self.previousHBA[RCUi,dev.store-1]=value[:]
+ for i in range(len(value)):
+ value[i]=UnMask(value[i],width,bitoffset)
+ return True;
+
+
def start(self,Q1):
def RCUthread(Q1):
while True:
item = Q1.get()
if item is None: break;
+ self.statevar.set_value("busy");
self.SetVar(item)
+ if Q1.qsize()==0: self.statevar.set_value("ready");
logging.info("End RCU thread")
RCUthread1 = threading.Thread(target=RCUthread, args=(Q1,))
@@ -314,13 +388,14 @@ class RCU1():
return RCUthread1
- def Queue_Monitor(self,Q1):
- Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_temp,32,[0]*32)
- Q1.put(Inst1)
-# Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_ADC_lock,96,[0]*96)
-# Q1.put(Inst1)
-
- def AddVars(self,Q1,AddVarR,AddVarW):
+ def Queue_Monitor(self,Q1,NRCU):
+ Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_temp,NRCU,[0]*NRCU)
+ Q1.put(Inst1)
+ Inst1=Vars.Instr(Vars.DevType.VarUpdate,Vars.RCU_ADC_lock,96,[0]*96)
+ Q1.put(Inst1)
+ return
+ def AddVars(self,Q1,AddVarR,AddVarW,AddVar):
+ self.statevar=AddVar("RCU_state_R","busy")
for v in Vars.OPC_devvars:
dim1=Vars.RCU_MPaddr.nI2C*Vars.RCU_MPaddr.nSwitch*v.nVars
dim2=Vars.RCU_MPaddr.nI2C*Vars.RCU_MPaddr.nSwitch*v.size
@@ -328,6 +403,7 @@ class RCU1():
#print(v.name,dim)
varvalue2=0
if v.type==Vars.datatype.dInt: varvalue2=dim2*[0]
+ elif v.type==Vars.datatype.dbool: varvalue2=dim2*[False]
elif v.type==Vars.datatype.dfloat: varvalue2=dim2*[0.0]
elif v.type==Vars.datatype.dstring: varvalue2=dim1*[" "*dim3]
print(len(varvalue2),varvalue2)
diff --git a/rcu/Vars.py b/rcu/Vars.py
index b8b389656e072d90020b18056ff66da2e280772f..7a14380585d0fab79f5dbe035b7eb8bd5d88e29d 100644
--- a/rcu/Vars.py
+++ b/rcu/Vars.py
@@ -21,11 +21,11 @@ RCU_temp1=Var2dev("RCU_temp1",RCUmod,DevType.I2C,RCU_AN_Temp ,23,0,4.21e-3)
dummy=Var2dev("Dummy",RCUmod,DevType.Internal,None,8,0,1)
-Ant_mask=VarArray("Ant_mask" ,3,[dummy,dummy,dummy] ,RW.WriteOnly,datatype.dInt,3,None,None)
+Ant_mask=VarArray("Ant_mask" ,3,[dummy,dummy,dummy] ,RW.WriteOnly,datatype.dbool,3,None,None)
RCU_att =VarArray("RCU_attenuator" ,3,[RCU_att1 ,RCU_att2 ,RCU_att3] ,RW.ReadWrite,datatype.dInt,3,None,None)
RCU_band=VarArray("RCU_band" ,3,[RCU_band1,RCU_band2,RCU_band3],RW.ReadWrite,datatype.dInt,3,None,None)
-RCU_mask=VarArray("RCU_mask" ,1,[dummy] ,RW.WriteOnly,datatype.dInt ,1,None,None)
+RCU_mask=VarArray("RCU_mask" ,1,[dummy] ,RW.WriteOnly,datatype.dbool ,1,None,None)
RCU_temp=VarArray("RCU_temperature",1,[RCU_temp1],RW.ReadOnly ,datatype.dfloat,1,None,None)
RCU_pwrd=VarArray("RCU_Pwr_dig" ,1,[RCU_pwrd1],RW.ReadOnly ,datatype.dInt ,1,None,None)
RCU_LED =VarArray("RCU_LED0" ,1,[RCU_led0] ,RW.ReadWrite,datatype.dInt ,1,None,None)
@@ -36,13 +36,21 @@ RCU_Dth1_freq=Var2dev("RCU_dth1_freq",RCUmod,DevType.I2Cbb,RCU_Dth1_Freq,32,0,1e
RCU_dth_freq=VarArray("RCU_dither_freq",3,[RCU_Dth1_freq,RCU_Dth2_freq,RCU_Dth3_freq],RW.ReadWrite,datatype.dfloat,3,None,None)
HBA1_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,5,2,1)
-HBA1_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,1,1,1)
HBA2_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,5,2,1)
-HBA2_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,1,1,1)
HBA3_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,5,2,1)
-HBA3_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,1,1,1)
-HBA1_Delay=VarArray("HBA_element_beamformer_delays",3,[HBA1_Delay,HBA2_Delay,HBA3_Delay],RW.ReadWrite,datatype.dInt,96,None,None)
-HBA1_Pwr =VarArray("HBA_element_pwr" ,3,[HBA1_Pwr ,HBA2_Pwr ,HBA3_Pwr ],RW.ReadWrite,datatype.dInt,96,None,None)
+HBA1_led =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,1,0,1)
+HBA2_led =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,1,0,1)
+HBA3_led =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,1,0,1)
+HBA1_pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,1,7,1)
+HBA2_pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,1,7,1)
+HBA3_pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,1,7,1)
+HBA1_pwr2 =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,1,1,1)
+HBA2_pwr2 =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,1,1,1)
+HBA3_pwr2 =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,1,1,1)
+HBA_Delay=VarArray("HBA_element_beamformer_delays",3,[HBA1_Delay,HBA2_Delay,HBA3_Delay],RW.ReadWrite,datatype.dInt,96,None,None)
+HBA_led =VarArray("HBA_element_led" ,3,[HBA1_led ,HBA2_led ,HBA3_led ],RW.ReadWrite,datatype.dInt,96,None,None)
+HBA_pwr =VarArray("HBA_element_pwr" ,3,[HBA1_pwr ,HBA2_pwr ,HBA3_pwr ],RW.ReadWrite,datatype.dInt,96,None,None)
+HBA_pwr2 =VarArray("HBA_element_pwr2" ,3,[HBA1_pwr2 ,HBA2_pwr2 ,HBA3_pwr2 ],RW.ReadWrite,datatype.dInt,96,None,None)
#RCU_ID0=Var2dev("",RCUmod,DevType.I2C,RCU_ROM,8,0,1)
#RCU_ID=VarArray("RCU_ID",1,[RCU_ID0],RW.ReadOnly,datatype.dInt,4,None,None)
@@ -53,6 +61,14 @@ RCU_Ver0=Var2dev("",RCUmod,DevType.I2C,RCU_ROM_Ver,7,0,1)
RCU_VER=VarArray("RCU_version",1,[RCU_Ver0],RW.ReadOnly,datatype.dstring,10,None,None)
+RCU_uCV_ID =VarArray("uC_ID " ,1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,0,0,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+RCU_uCV_spd0 =VarArray("uC_spd0" ,1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,1,1,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+RCU_uCV_debug =VarArray("uC_debug" ,1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,2,2,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+RCU_uCV_RXspd1=VarArray("uC_RXspd1",1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,3,3,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+RCU_uCV_RXspd2=VarArray("uC_RXspd2",1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,4,4,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+RCU_uCV_TXspd1=VarArray("uC_TXspd1",1,[Var2dev("",RCUmod,DevType.I2C,DevReg(0x40,6,6,0),8 ,0,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+
+
RCU_ADC1_lock=Var2dev("RCU_ADC1_lock",RCUmod,DevType.SPIbb,RCU_ADC1_PLL_stat,8,0,1)
RCU_ADC2_lock=Var2dev("RCU_ADC2_lock",RCUmod,DevType.SPIbb,RCU_ADC2_PLL_stat,8,0,1)
RCU_ADC3_lock=Var2dev("RCU_ADC3_lock",RCUmod,DevType.SPIbb,RCU_ADC3_PLL_stat,8,0,1)
@@ -95,15 +111,10 @@ RCU_OUT2=VarArray("RCU_OUT2",3,[RCU_IO1_2,RCU_IO2_2,RCU_IO3_2],RW.ReadOnly,datat
#RCU_CNF1=VarArray("RCU_CONF1",3,[RCU_IO1_3,RCU_IO2_3,RCU_IO3_3],RW.ReadOnly,datatype.dInt,None,None)
#RCU_CNF2=VarArray("RCU_CONF2",3,[RCU_IO1_4,RCU_IO2_4,RCU_IO3_4],RW.ReadOnly,datatype.dInt,None,None)
-
-
-OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ADC_lock,RCU_ADC_SYNC,RCU_ADC_JESD,RCU_ADC_CML,RCU_OUT1,RCU_OUT2,RCU_ID,RCU_VER,HBA1_Delay,HBA1_Pwr]#,RCU_CNF1,RCU_CNF2]
-
-
-
-
-
-
+#OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ID,RCU_VER,HBA_Delay,HBA_led]
+#OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ID,RCU_VER,HBA_Delay,HBA_led,RCU_uCV_ID]
+OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ADC_lock,RCU_ADC_SYNC,RCU_ADC_JESD,RCU_ADC_CML,RCU_OUT1,RCU_OUT2,RCU_ID,RCU_VER,HBA_Delay,HBA_led,HBA_pwr,HBA_pwr2,RCU_uCV_ID]
+#OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_uCV_ID,RCU_uCV_spd0,RCU_uCV_RXspd1,RCU_uCV_RXspd2,RCU_uCV_TXspd1,RCU_uCV_debug ]#,HBA1_Pwr]#,RCU_CNF1,RCU_CNF2]
#Instr=namedtuple("DevInstr","type dev nvalue value")
#Instrs=namedtuple("Instr","name ninstr instr")
@@ -114,46 +125,52 @@ RCU_init=Instrs("ReadRegisters",2,[
Instr(DevType.VarUpdate,RCU_OUT2,3,[0,0,0])
])
-ADC_on=Instrs("ADC_on",16,[
+ADC_on=Instrs("ADC_on",17,[
Instr(DevType.SPIbb,RCU_ADC1_JESD_ctr,1,[0x14]),
Instr(DevType.SPIbb,RCU_ADC1_CML_level,1,[0x7]),
Instr(DevType.SPIbb,RCU_ADC1_SYNC_ctr,1,[1]),
+ Instr(DevType.SPIbb,RCU_ADC1_PLL_enc,1,[0x8]),
Instr(DevType.SPIbb,RCU_ADC1_update,1,[1]),
+ Instr(DevType.Wait,0,0,[100]),
Instr(DevType.SPIbb,RCU_ADC2_JESD_ctr,1,[0x14]),
Instr(DevType.SPIbb,RCU_ADC2_CML_level,1,[0x7]),
Instr(DevType.SPIbb,RCU_ADC2_SYNC_ctr,1,[1]),
+ Instr(DevType.SPIbb,RCU_ADC2_PLL_enc,1,[0x8]),
Instr(DevType.SPIbb,RCU_ADC2_update,1,[1]),
+ Instr(DevType.Wait,0,0,[100]),
Instr(DevType.SPIbb,RCU_ADC3_JESD_ctr,1,[0x14]),
Instr(DevType.SPIbb,RCU_ADC3_CML_level,1,[0x7]),
Instr(DevType.SPIbb,RCU_ADC3_SYNC_ctr,1,[1]),
+ Instr(DevType.SPIbb,RCU_ADC3_PLL_enc,1,[0x8]),
Instr(DevType.SPIbb,RCU_ADC3_update,1,[1]),
+ Instr(DevType.Wait,0,0,[500]),
Instr(DevType.VarUpdate,RCU_ADC_SYNC,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_ADC_JESD,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_ADC_CML,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_ADC_lock,3,[0,0,0])
])
-RCU_on=Instrs("RCU_on",12,[
+RCU_on=Instrs("RCU_on",20,[
Instr(DevType.I2C,RCU_IO2_CONF1,1,[0]),
Instr(DevType.I2C,RCU_IO2_CONF2,1,[0]),
+ Instr(DevType.I2C,RCU_IO2_OUT1,1,[0x4A]),
+ Instr(DevType.I2C,RCU_IO2_OUT2,1,[0x55]),
+ Instr(DevType.Wait,0,0,[300]),
Instr(DevType.I2C,RCU_IO3_CONF1,1,[0]),
Instr(DevType.I2C,RCU_IO3_CONF2,1,[0]),
Instr(DevType.I2C,RCU_IO1_CONF1,1,[0]),
Instr(DevType.I2C,RCU_IO1_CONF2,1,[0]),
- Instr(DevType.I2C,RCU_IO2_OUT1,1,[0x4A]),
- Instr(DevType.I2C,RCU_IO2_OUT2,1,[0x55]),
Instr(DevType.I2C,RCU_IO3_OUT1,1,[0x15]),
Instr(DevType.I2C,RCU_IO3_OUT2,1,[0x47]),
Instr(DevType.I2C,RCU_IO1_OUT1,1,[0xCA]),
Instr(DevType.I2C,RCU_IO1_OUT2,1,[0xCA]),
-# Instr(DevType.VarUpdate,RCU_att,3,[0,0,0]),
+ Instr(DevType.Wait,0,0,[200]),
+ Instr(DevType.VarUpdate,RCU_att,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_pwrd,1,[0]),
Instr(DevType.VarUpdate,RCU_OUT1,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_OUT2,3,[0,0,0]),
-# Instr(DevType.Instr,ADC1_on,0,[]),
-# Instr(DevType.Instr,ADC2_on,0,[]),
-# Instr(DevType.Instr,ADC3_on,0,[])
-# Instr(DevType.VarUpdate,RCU_ADC_lock,3,[0,0,0])
+# Instr(DevType.Wait,0,0,[300]),
+ Instr(DevType.Instr,ADC_on,0,[])
])
RCU_off=Instrs("RCU_off",1,[
@@ -170,7 +187,7 @@ RCU_update=Instrs("RCU_update",11,[
# Instr(DevType.VarUpdate,RCU_VER,1,[0]*10),
Instr(DevType.VarUpdate,RCU_att,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_band,3,[0,0,0]),
- Instr(DevType.VarUpdate,RCU_LED,3,[0,0,0]),
+ Instr(DevType.VarUpdate,RCU_LED,1,[0]),
Instr(DevType.VarUpdate,RCU_ADC_SYNC,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_ADC_JESD,3,[0,0,0]),
Instr(DevType.VarUpdate,RCU_ADC_CML,3,[0,0,0]),
diff --git a/rcu/spibitbang1.py b/rcu/spibitbang1.py
index 14541d75b70c1961a206a5c39533afccccec0d6e..ca8fd300bdb46cd1463318a9ea9b727d1c323580 100644
--- a/rcu/spibitbang1.py
+++ b/rcu/spibitbang1.py
@@ -109,21 +109,23 @@ def GetSPIbb2(SetI2C,GetI2C,RCUi,devs,value):
ADC_rw = 0x01 # 0 for write, 1 for read
data = ( ADC_rw << 15) + ( ADC_bytes << 13 ) + ADC_reg_address
+ Setbit(CLK,0)
Setbit(CS,0) #enable
bit_array = "{0:{fill}16b}".format(data, fill='0')
logging.debug(str(("SPI TX",bit_array)))
for bit in bit_array:
+ Setbit(CLK,0)
Setbit(SDIO,int(bit))
Setbit(CLK,1)
- Setbit(CLK,0)
- Setbit(CS,1) #disable
+# Setbit(CS,1) #disable
+ Setbit(SDIOdir,1) #input
+ Setbit(CLK,0)
# print("read byte")
- Setbit(SDIOdir,1) #input
- Setbit(CS,0) #enable
+# Setbit(CS,0) #enable
a=[0]
N=len(value)
for i in range(N): value[i]=0
diff --git a/scripts/ADCreset.py b/scripts/ADCreset.py
index b0f208abaf03277f350b210cc2ee279566f3c96a..e42c94acc4acadf705c19747f1f63955e81d6814 100644
--- a/scripts/ADCreset.py
+++ b/scripts/ADCreset.py
@@ -1,13 +1,14 @@
from test_common import *
-RCUs=[0];
+RCUs=[0,1,2,3];
setRCUmask(RCUs)
-callmethod("RCU_off")
-time.sleep(1)
+#callmethod("RCU_off")
+#exit()
+#time.sleep(2)
callmethod("RCU_on")
-callmethod("RCU_on")
-time.sleep(1)
-callmethod("ADC_on")
+#callmethod("RCU_on")
+#time.sleep(1)
+#callmethod("ADC_on")
disconnect();
diff --git a/scripts/Att.py b/scripts/Att.py
index 6e5d7b14ec651ce3f809a7a380db6e671faff67c..65ca66bb1801a2ea14de4937014a258053f663e4 100644
--- a/scripts/Att.py
+++ b/scripts/Att.py
@@ -1,26 +1,20 @@
from test_common import *
name="RCU_attenuator"
-RCU=0;
-Att=[5,5,5]
+RCU=[0];
+Att=[1,1,1]
-#setAntmask([RCU])
+setAntmask(RCU)
att=get_value(name+"_R")
-val=att.Value.Value
-print("Att old:",val)
-#print("Att old:",att[3*RCU:3*RCU+3])
-
-val[3*RCU:3*RCU+3]=Att
-att.Value.Value=val
-print("Att set:",val)
-#att[3*RCU]+=1
+print("Att old:",att[:12])
+for r in RCU:
+ att[3*r:3*r+3]=Att
set_value(name+"_RW",att)
time.sleep(0.5)
att=get_value(name+"_R")
-print("Att new:",att.Value.Value)
-#print("Att new:",att[3*RCU:3*RCU+3])
+print("Att new:",att[:12])
disconnect()
\ No newline at end of file
diff --git a/scripts/Band.py b/scripts/Band.py
new file mode 100644
index 0000000000000000000000000000000000000000..c4502783269cb5937749a4016a63878b301e6216
--- /dev/null
+++ b/scripts/Band.py
@@ -0,0 +1,20 @@
+from test_common import *
+
+name="RCU_band"
+RCU=3;
+Att=[3,3,3]
+
+
+setAntmask([RCU])
+
+att=get_value(name+"_R")
+print("Att old:",att[3*RCU:3*RCU+3])
+
+att[3*RCU:3*RCU+3]=Att
+set_value(name+"_RW",att)
+
+time.sleep(0.5)
+att=get_value(name+"_R")
+print("Att new:",att[3*RCU:3*RCU+3])
+
+disconnect()
\ No newline at end of file
diff --git a/scripts/CLK.py b/scripts/CLK.py
new file mode 100644
index 0000000000000000000000000000000000000000..4dbf2b4179174154d421998068cee27faa7108cb
--- /dev/null
+++ b/scripts/CLK.py
@@ -0,0 +1,16 @@
+from test_common import *
+
+#callmethod("CLK_off")
+#time.sleep(1)
+
+callmethod("CLK_on")
+time.sleep(1)
+callmethod("CLK_PLL_setup")
+#exit()
+#time.sleep(1)
+#callmethod("RCU_on")
+#callmethod("RCU_on")
+#time.sleep(1)
+#callmethod("ADC_on")
+
+disconnect();
diff --git a/scripts/LED.py b/scripts/LED.py
index d1857ae8879599d05c32afecce64f161f5cba1ea..c4d882325cf9d3d547e1962b9701541a162cc143 100644
--- a/scripts/LED.py
+++ b/scripts/LED.py
@@ -1,15 +1,14 @@
from test_common import *
name="RCU_LED0"
-RCU=1;
-LEDvalue="on";
+RCU=0;
+LEDvalue=2;
setRCUmask([RCU])
-#exit()
+
led=get_value(name+"_R")
print("LED old:",led)
led[RCU]=LEDvalue
-print("LED changed:",led)
set_value(name+"_RW",led)
time.sleep(0.1)
diff --git a/scripts/RCUupdate.py b/scripts/RCUupdate.py
index 42dde847e5ad4c65793086b57396c55856d6d292..3d9d5857a37a76a1f32c3853d5732dcc1456518a 100644
--- a/scripts/RCUupdate.py
+++ b/scripts/RCUupdate.py
@@ -1,7 +1,9 @@
from test_common import *
-RCUs=[0];
+RCUs=[3];
setRCUmask(RCUs)
+#for RCU in RCUs:
+setAntmask(RCUs,[True,True,True])
callmethod("RCU_update")
diff --git a/scripts/SetHBAT_BF.py b/scripts/SetHBAT_BF.py
new file mode 100644
index 0000000000000000000000000000000000000000..9147882137cc238a7db4626624d62b243f1d10ff
--- /dev/null
+++ b/scripts/SetHBAT_BF.py
@@ -0,0 +1,26 @@
+RCU=3
+HBAT=1 #HBAT on RCU 0..2
+#HBA=5; #HBA Element in HBAT
+#BFX=11 #delay in 0.5ns
+#BFY=BFX+1
+name="HBA_element_beamformer_delays"
+
+from test_common import *
+import numpy as np
+
+AntMask=[(x==HBAT) for x in range(3)]
+setAntmask([RCU],AntMask)
+
+i=(RCU*3+HBAT)*32
+
+val=get_value(name+"_R")
+print("old:",val[i:i+32])
+
+val[i:i+32]=np.array(range(32))[::]*0+1
+
+set_value(name+"_RW",val)
+time.sleep(1)
+val=get_value(name+"_R")
+print("new:",val[i:i+32])
+
+disconnect()
diff --git a/scripts/SetHBAT_LED.py b/scripts/SetHBAT_LED.py
new file mode 100644
index 0000000000000000000000000000000000000000..8a7c090771951628e69beaec00a32a859ae78dbe
--- /dev/null
+++ b/scripts/SetHBAT_LED.py
@@ -0,0 +1,28 @@
+RCU=3
+HBAT=1 #HBAT on RCU 0..2
+LED=1 #on
+name="HBA_element_led"
+
+from test_common import *
+import numpy as np
+
+AntMask=[(x==HBAT) for x in range(3)]
+setAntmask([RCU],AntMask)
+
+i=(RCU*3+HBAT)*32
+
+val=get_value(name+"_R")
+#print("old:",val)
+print("old:",val[i:i+32])
+for x in range(32):
+ val[i+x]=LED
+#val[i]=LED #Not needed for LED
+#val[i+1]=LED
+
+set_value(name+"_RW",val)
+time.sleep(1)
+val=get_value(name+"_R")
+#print("new:",val)
+print("new:",val[i:i+32])
+
+disconnect()
diff --git a/scripts/SetHBAT_pwr.py b/scripts/SetHBAT_pwr.py
new file mode 100644
index 0000000000000000000000000000000000000000..f20d4cee1d054b52e32f39f34c4ac177fe227a65
--- /dev/null
+++ b/scripts/SetHBAT_pwr.py
@@ -0,0 +1,41 @@
+RCU=3
+HBAT=1 #HBAT on RCU 0..2
+#HBA=5; #HBA Element in HBAT
+#BFX=11 #delay in 0.5ns
+#BFY=BFX+1
+name="HBA_element_pwr"
+
+from test_common import *
+import numpy as np
+
+AntMask=[(x==HBAT) for x in range(3)]
+setAntmask([RCU],AntMask)
+
+i=(RCU*3+HBAT)*32
+
+val=get_value(name+"_R")
+print("old:",val[i:i+32])
+
+val[i:i+32]=np.ones([32])
+#val[i:i+32]=np.zeros([32])
+
+set_value(name+"_RW",val)
+
+#time.sleep(0.5)
+#busy=get_value("RCU_state_R")
+#print(busy)
+for x in range(10):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ if (busy=='busy'): break;
+ time.sleep(0.05)
+while not(busy=='ready'):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ time.sleep(0.05)
+
+val=get_value(name+"_R")
+print("new:",val[i:i+32])
+
+
+disconnect()
diff --git a/scripts/SetHBAT_pwr_loop.py b/scripts/SetHBAT_pwr_loop.py
new file mode 100644
index 0000000000000000000000000000000000000000..6bae64c4a9fe3d204cf4dabdc87d87f1a0640c1b
--- /dev/null
+++ b/scripts/SetHBAT_pwr_loop.py
@@ -0,0 +1,62 @@
+RCU=3
+HBAT=1 #HBAT on RCU 0..2
+#HBA=5; #HBA Element in HBAT
+#BFX=11 #delay in 0.5ns
+#BFY=BFX+1
+name="HBA_element_pwr"
+
+from test_common import *
+import numpy as np
+
+AntMask=[(x==HBAT) for x in range(3)]
+setAntmask([RCU],AntMask)
+
+i=(RCU*3+HBAT)*32
+
+val=get_value(name+"_R")
+print("old:",val[i:i+32])
+
+for ii in range(10):
+ val[i:i+32]=np.ones([32])
+#val[i:i+32]=np.zeros([32])
+
+ set_value(name+"_RW",val)
+
+#time.sleep(0.5)
+#busy=get_value("RCU_state_R")
+#print(busy)
+ for x in range(10):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ if (busy=='busy'): break;
+ time.sleep(0.05)
+ while not(busy=='ready'):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ time.sleep(0.05)
+
+ val=get_value(name+"_R")
+ print("new:",val[i:i+32])
+
+#val[i:i+32]=np.ones([32])
+ val[i:i+32]=np.zeros([32])
+
+ set_value(name+"_RW",val)
+
+#time.sleep(0.5)
+#busy=get_value("RCU_state_R")
+#print(busy)
+ for x in range(10):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ if (busy=='busy'): break;
+ time.sleep(0.05)
+ while not(busy=='ready'):
+ busy=get_value("RCU_state_R")
+# print(busy)
+ time.sleep(0.05)
+
+ val=get_value(name+"_R")
+ print("new:",val[i:i+32])
+
+disconnect()
diff --git a/scripts/SetHBA_BF.py b/scripts/SetHBA_BF.py
index 160cf79a86a1bec3f1fe46c282f08f2c59e0928c..697a9a2a6c32ae88cbb330ed49b79ee10c26c928 100644
--- a/scripts/SetHBA_BF.py
+++ b/scripts/SetHBA_BF.py
@@ -1,7 +1,7 @@
-RCU=0
-HBAT=1 #HBAT on RCU 0..2
+RCU=1
+HBAT=0 #HBAT on RCU 0..2
HBA=5; #HBA Element in HBAT
-BFX=1 #delay in 0.5ns
+BFX=11 #delay in 0.5ns
BFY=BFX+1
name="HBA_element_beamformer_delays"
diff --git a/scripts/SetHBA_LED.py b/scripts/SetHBA_LED.py
index b334ed02b06d505b3c727555f5b9860ad76f37ad..7869dacb128c127c124fdbdfb0d6b77b2d16ce50 100644
--- a/scripts/SetHBA_LED.py
+++ b/scripts/SetHBA_LED.py
@@ -1,6 +1,6 @@
-RCU=0
+RCU=1
HBAT=1 #HBAT on RCU 0..2
-HBA=5; #HBA Element in HBAT
+HBA=14; #HBA Element in HBAT
LED=0 #on
name="HBA_element_led"
diff --git a/scripts/SetMonitor.py b/scripts/SetMonitor.py
index fa97710d7db14ece16520288bb451e8a60d83b89..b303a5a94743d6c6e1a22c443214b6323133c37a 100644
--- a/scripts/SetMonitor.py
+++ b/scripts/SetMonitor.py
@@ -1,6 +1,6 @@
from test_common import *
-rate= 60 #seconds
+rate= 10 #seconds
name="RCU_monitor_rate_RW"
print("old:",get_value(name))
diff --git a/scripts/i2clinetest.py b/scripts/i2clinetest.py
new file mode 100644
index 0000000000000000000000000000000000000000..eebbb0324564c823e275e0be738c45fc07fa6448
--- /dev/null
+++ b/scripts/i2clinetest.py
@@ -0,0 +1,17 @@
+#from gpiozero import LED,Button
+import RPi.GPIO as GPIO
+#SCL=3
+#SDA=2
+
+SCL=24
+SDA=23
+
+GPIO.setmode(GPIO.BCM)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA ",GPIO.input(SDA))
+print("SCL ",GPIO.input(SCL))
+
+GPIO.cleanup()
+
diff --git a/scripts/i2creset.py b/scripts/i2creset.py
new file mode 100644
index 0000000000000000000000000000000000000000..2e992b0ff5d25b3c3538f4048f6b097689a95a9f
--- /dev/null
+++ b/scripts/i2creset.py
@@ -0,0 +1,43 @@
+#from gpiozero import LED,Button
+import RPi.GPIO as GPIO
+SCL=3
+SDA=2
+
+GPIO.setmode(GPIO.BCM)
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA=",GPIO.input(SDA))
+print("SCL=",GPIO.input(SCL))
+GPIO.cleanup()
+
+exit()
+GPIO.setmode(GPIO.BCM)
+print("Clock")
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.OUT)
+for x in range(10):
+ GPIO.output(SCL,0)
+ print("SDA=",GPIO.input(SDA))
+ GPIO.output(SCL,1)
+ print("SDA=",GPIO.input(SDA))
+
+print("STOP")
+#GPIO.setup(SCL,GPIO.OUT)
+GPIO.output(SCL,0)
+GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,1)
+GPIO.output(SDA,1)
+GPIO.setup(SDA,GPIO.IN)
+print("SDA=",GPIO.input(SDA))
+
+GPIO.cleanup()
+
+#SCL=LED(9)
+#SDA=Button(8)
+
+#if Button.is_pressed: print("High")
+#SCL.on()
+#SCL.off()
+
+
diff --git a/scripts/i2creset2.py b/scripts/i2creset2.py
new file mode 100644
index 0000000000000000000000000000000000000000..2ff714e32cb493d6beb6099a615cd86d9b8303e7
--- /dev/null
+++ b/scripts/i2creset2.py
@@ -0,0 +1,71 @@
+#from gpiozero import LED,Button
+import RPi.GPIO as GPIO
+SCL=3
+SDA=2
+Addr=0x70 #SWITCH
+#Addr=0x20 #io expander
+Value=0
+data=[(Addr<<1)+0,Value] #Write
+#data=[Addr<<1+1] #Read
+
+GPIO.setmode(GPIO.BCM)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+
+#GPIO.setup(SDA,GPIO.OUT)
+GPIO.setup(SCL,GPIO.OUT)
+
+#GPIO.output(SDA,1)
+GPIO.output(SCL,1)
+
+#Start
+#GPIO.output(SDA,0)
+GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,0)
+
+for b in data:
+ ba="{0:{fill}8b}".format(b,fill='0')
+ print("Sending",ba)
+ for bit in ba:
+ if int(bit)==0:
+ GPIO.setup(SDA,GPIO.OUT)
+ GPIO.output(SDA,0)
+ else:
+ GPIO.setup(SDA,GPIO.IN)
+# GPIO.output(SDA,int(bit))
+ GPIO.output(SCL,1)
+ GPIO.output(SCL,0)
+
+
+ GPIO.setup(SDA,GPIO.IN)
+# GPIO.output(SDA,0)
+# print("Ack",GPIO.input(SDA)==0)
+# GPIO.setup(SDA,GPIO.OUT)
+
+ #ack clock
+ GPIO.output(SCL,1)
+# GPIO.setup(SDA,GPIO.IN)
+ print("Ack",GPIO.input(SDA)==0)
+# GPIO.setup(SDA,GPIO.OUT)
+ GPIO.output(SCL,0)
+ print("Ack released",GPIO.input(SDA)==1)
+
+
+#Stop
+#GPIO.output(SDA,0)
+GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,1)
+GPIO.output(SDA,1)
+#GPIO.setup(SDA,GPIO.IN)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+GPIO.cleanup()
+
diff --git a/scripts/i2creset2b.py b/scripts/i2creset2b.py
new file mode 100644
index 0000000000000000000000000000000000000000..a41c4c209f05533f9af90e080a65e96befd94d70
--- /dev/null
+++ b/scripts/i2creset2b.py
@@ -0,0 +1,70 @@
+#from gpiozero import LED,Button
+import RPi.GPIO as GPIO
+SCL=3
+SDA=2
+Addr=0x70 #SWITCH
+#Addr=0x20 #io expander
+Value=0
+data=[(Addr<<1)+0,Value] #Write
+#data=[Addr<<1+1] #Read
+
+GPIO.setmode(GPIO.BCM)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+
+GPIO.setup(SDA,GPIO.OUT)
+GPIO.setup(SCL,GPIO.OUT)
+
+GPIO.output(SDA,1)
+GPIO.output(SCL,1)
+
+#Start
+#GPIO.output(SDA,0)
+#GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,0)
+
+for b in data:
+ ba="{0:{fill}8b}".format(b,fill='0')
+ print("Sending",ba)
+ for bit in ba:
+# if int(bit)==0:
+# GPIO.setup(SDA,GPIO.OUT)
+# GPIO.output(SDA,0)
+# else:
+# GPIO.setup(SDA,GPIO.IN)
+ GPIO.output(SDA,int(bit))
+ GPIO.output(SCL,1)
+ GPIO.output(SCL,0)
+
+
+ GPIO.setup(SDA,GPIO.IN)
+# GPIO.output(SDA,0)
+# print("Ack",GPIO.input(SDA)==0)
+# GPIO.setup(SDA,GPIO.OUT)
+
+ #ack clock
+ GPIO.output(SCL,1)
+# GPIO.setup(SDA,GPIO.IN)
+ print("Ack",GPIO.input(SDA)==0)
+ GPIO.output(SCL,0)
+ print("Ack released",GPIO.input(SDA)==1)
+ GPIO.setup(SDA,GPIO.OUT)
+
+#Stop
+#GPIO.output(SDA,0)
+#GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,1)
+GPIO.output(SDA,1)
+#GPIO.setup(SDA,GPIO.IN)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+GPIO.cleanup()
+
diff --git a/scripts/i2cresetCLK.py b/scripts/i2cresetCLK.py
new file mode 100644
index 0000000000000000000000000000000000000000..aa09dbbf67dbb500cc983044b0d7d5ff05721f5c
--- /dev/null
+++ b/scripts/i2cresetCLK.py
@@ -0,0 +1,70 @@
+#from gpiozero import LED,Button
+import RPi.GPIO as GPIO
+SCL=24
+SDA=23
+Addr=0x20 #SWITCH
+#Addr=0x20 #io expander
+Value=0
+data=[(Addr<<1)+0,Value] #Write
+#data=[Addr<<1+1] #Read
+
+GPIO.setmode(GPIO.BCM)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+
+GPIO.setup(SDA,GPIO.OUT)
+GPIO.setup(SCL,GPIO.OUT)
+
+GPIO.output(SDA,1)
+GPIO.output(SCL,1)
+
+#Start
+#GPIO.output(SDA,0)
+#GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,0)
+
+for b in data:
+ ba="{0:{fill}8b}".format(b,fill='0')
+ print("Sending",ba)
+ for bit in ba:
+# if int(bit)==0:
+# GPIO.setup(SDA,GPIO.OUT)
+# GPIO.output(SDA,0)
+# else:
+# GPIO.setup(SDA,GPIO.IN)
+ GPIO.output(SDA,int(bit))
+ GPIO.output(SCL,1)
+ GPIO.output(SCL,0)
+
+
+ GPIO.setup(SDA,GPIO.IN)
+# GPIO.output(SDA,0)
+# print("Ack",GPIO.input(SDA)==0)
+# GPIO.setup(SDA,GPIO.OUT)
+
+ #ack clock
+ GPIO.output(SCL,1)
+# GPIO.setup(SDA,GPIO.IN)
+ print("Ack",GPIO.input(SDA)==0)
+ GPIO.output(SCL,0)
+ print("Ack released",GPIO.input(SDA)==1)
+ GPIO.setup(SDA,GPIO.OUT)
+
+#Stop
+#GPIO.output(SDA,0)
+#GPIO.setup(SDA,GPIO.OUT)
+GPIO.output(SDA,0)
+GPIO.output(SCL,1)
+GPIO.output(SDA,1)
+#GPIO.setup(SDA,GPIO.IN)
+
+GPIO.setup(SDA,GPIO.IN)
+GPIO.setup(SCL,GPIO.IN)
+print("SDA high",GPIO.input(SDA)==1)
+print("SCL high",GPIO.input(SCL)==1)
+GPIO.cleanup()
+
diff --git a/scripts/test_common.py b/scripts/test_common.py
index f9e5b4273446be810256f18409c13ae1be6de240..6df8d703b8cf7868d60474dffd610dad8406eb1e 100644
--- a/scripts/test_common.py
+++ b/scripts/test_common.py
@@ -1,6 +1,5 @@
#Address="opc.tcp://odroidRCU2:4842/"
-Address="opc.tcp://dop444:4840/"
-#Address="opc.tcp://ltspi:4842/"
+Address="opc.tcp://LTSpi:4842/"
import sys
sys.path.insert(0, "..")
import logging
@@ -28,13 +27,11 @@ def disconnect():
def get_value(name):
var1 = root.get_child(["0:Objects", "2:PCC", "2:"+name])
-# return var1.get_value()
- return var1.get_data_value()
+ return var1.get_value()
def set_value(name,value):
var1 = root.get_child(["0:Objects", "2:PCC", "2:"+name])
var1.set_value(value)
-# var1.set_data_value(value,7)
def setRCUmask(rcu=[]):
name="RCU_mask_RW"
@@ -42,7 +39,6 @@ def setRCUmask(rcu=[]):
print(name," old:",M)
M=[False for m in M]
for r in rcu:
-# M[r]=1
M[r]=True
set_value(name,M)
print(name," new:",get_value(name))