diff --git a/config/CLK.yaml b/config/CLK.yaml
index 02bb6475215b10a056cf109e877265f6c4275fa3..6399a6666d3e4bcb9d2f30a8813dc3f50ee047bd 100644
--- a/config/CLK.yaml
+++ b/config/CLK.yaml
@@ -135,6 +135,7 @@ methods:
      - IO1.CONF1: 0x2C #0010 1100 PPS/PWR output, SCLK,CS,SDI
      - IO1.GPIO1: 0x00 #all low
      - CLK_Enable_PWR: Update
+     - CLK_PLL_locked: Update
 
   - name: CLK_PLL_setup  
     driver: I2C_CLK
diff --git a/config/RCU.yaml b/config/RCU.yaml
index 03b8e757a2f2a472f0fc6351bc1b41d568be0ae1..5cae6d6c03be422d91b1164308c62f97a41162d4 100644
--- a/config/RCU.yaml
+++ b/config/RCU.yaml
@@ -158,7 +158,9 @@ device_registers:
     - name: JESD_control1
       description: JESD link control
       address: 0x5F
-    - name: CML_adjust
+    - name: SYNC_control
+      address: 0x3A
+    - name: CML_level
       description: CML output adjust
       address: 0x15
     - name: Update
@@ -344,9 +346,18 @@ variables:
      rw:  ro
      dtype: uint8
      dim: 96
-     mask: RCU_I2C_STATUS
      monitor: true
 
+   - name: RCU_ADC_sync
+     description: 0x81=locked
+     driver: I2C_RCU
+     devreg:  [ADC1.SYNC_control,ADC2.SYNC_control,ADC3.SYNC_control]
+     width: 8
+     rw:  ro
+     dtype: uint8
+     dim: 96
+     debug: true
+
 #   - name: RCU_dth1_freq
 #     driver: I2C_RCU
 #     devreg:  [DTH1.Freq,DTH2.Freq,DTH3.Freq]
@@ -413,6 +424,7 @@ methods:
       - RCU_attenuator: Update
       - RCU_band: Update
       - RCU_ADC_lock: Update
+      - RCU_ADC_sync: Update
 
 
   - name: ADC1_on
@@ -446,6 +458,8 @@ methods:
      - ADC3.Update: 1       #Needed to update ADC registers
 
   - name: RCU_off
+    driver: I2C_RCU
+    mask: RCU_mask
     instructions:
      - RCU_Pwr_dig: 0 #Switch power off
      - IO2.GPIO1: 0
@@ -454,6 +468,7 @@ methods:
      - IO3.GPIO2: 0
      - IO1.GPIO1: 0
      - IO1.GPIO2: 0
+     - RCU_update: 0
      #todo, also make all GPIO pins (except power enables) inputs to remove all power from devices.
 
   - name: RCU_HBAT_WAIT_PPS