diff --git a/pypcc/config/RECVTR_HB.yaml b/pypcc/config/RECVTR_HB.yaml
index 49ecbdf6170df6b9fc0fd09c1555eb8e9a9f5d84..db10e0c9555b2ae5e1e136713453e87ec4abf6b2 100644
--- a/pypcc/config/RECVTR_HB.yaml
+++ b/pypcc/config/RECVTR_HB.yaml
@@ -774,6 +774,15 @@ methods:
      - IO3.CONF2: 0
      - IO1.CONF1: 0
 #     - IO1.CONF2: 0
+#ADC SPI bus reset 
+     -  IO3.GPIO2: 0x40 #CS low
+     -  IO3.GPIO1: 0x17 #CLK high
+     -  IO3.GPIO1: 0x15 #CLK low
+     -  IO3.GPIO1: 0x17 #CLK high
+     -  IO3.GPIO1: 0x15 #CLK low
+     -  IO3.GPIO2: 0x47 #CS high
+
+
      - IO4.CONF1: 0xC0 #pin 0x40, 0x80 not used
      - IO4.CONF2: 0xF8 
      - IO4.GPIO1: 0x2A #DAB switch states: 0x2A or 0x51
diff --git a/pypcc/config/RECVTR_LB.yaml b/pypcc/config/RECVTR_LB.yaml
index 7da36600b7d4f07d555c86c9a9cfe023ee36b2d0..5f76893e840a8764ef8437e18663b26e903dd302 100644
--- a/pypcc/config/RECVTR_LB.yaml
+++ b/pypcc/config/RECVTR_LB.yaml
@@ -151,6 +151,8 @@ device_registers:
       address: 0xFF
     - name: testmode
       address: 0x0D
+    - name: test
+      address: 0x19 #a register to test reading and writing
     - name: dither
       address: 0x0C
     - name: JESDscramble
@@ -504,6 +506,19 @@ variables:
 #     monitor: true
      read_parallel: true
 
+   - name: RCU_ADC_test
+     driver: I2C_RCU
+     devreg:  [ADC1.test,ADC2.test,ADC3.test]
+     width: 8
+     rw:  rw
+     dtype: uint8
+     dim: 96
+     dim2: [3,32]
+     debug: true
+     read_parallel: true
+     mask: ANT_mask
+
+
    - name: RCU_ADC_sync
      driver: I2C_RCU
      devreg:  [ADC1.SYNC_control,ADC2.SYNC_control,ADC3.SYNC_control]
@@ -667,8 +682,17 @@ methods:
      - IO3.POL1: 0
      - IO3.CONF1: 0
      - IO3.CONF2: 0
+
+#ADC SPI bus reset 
+     -  IO3.GPIO2: 0x40 #CS low
+     -  IO3.GPIO1: 0x17 #CLK high
+     -  IO3.GPIO1: 0x15 #CLK low
+     -  IO3.GPIO1: 0x17 #CLK high
+     -  IO3.GPIO1: 0x15 #CLK low
+     -  IO3.GPIO2: 0x47 #CS high
+
 #     - RCU_GPIO1: Update
-     - RCU_GPIO2: Update
+#     - RCU_GPIO2: Update
 #     - RCU_attenuator: [10,10,10]  #Set OPC-UA variable
 #name="RCU_DTH_shutdown"
      - RCU_update: 0
diff --git a/python_scripts/ADCtest.py b/python_scripts/ADCtest.py
new file mode 100644
index 0000000000000000000000000000000000000000..4277930277c95d9540c90097247a03aa2d86c38c
--- /dev/null
+++ b/python_scripts/ADCtest.py
@@ -0,0 +1,161 @@
+##NB translator should be off or monitor should be 0
+name='RECVTR_LB' #YAML config file with all register values etc
+varID='RCU_PCB_ID'
+regname="RCU_ADC_test"
+
+logFile='ADCtest'
+
+import logging
+import argparse
+from pypcc.opcuaserv import opcuaserv,i2client,yamlreader
+#from opcuaserv import pypcc2
+from pypcc.i2cserv import i2cthread
+import threading
+import time
+import sys
+import signal
+from pypcc.yamlconfig import Find;
+import pypcc.yamlconfig as yc
+from datetime import datetime
+import numpy as np
+
+testtime=datetime.now().strftime("%y-%m-%d %H:%M")
+#if len(sys.argv)<3:
+#  print("setVersion RCUnr RCUsi HBAnr");
+#  print("e.g. SetVersion 8 1 1")
+#  exit();
+
+#RCUNR=int(sys.argv[1]);
+#SINR=int(sys.argv[2]);
+#HBANR=int(sys.argv[3]);
+#print(RCUNR,SINR,HBANR)
+logging.basicConfig(level="WARNING",format='%(asctime)s [%(levelname)-8s,%(filename)-20s:%(lineno)-3d] %(message)s')
+#logging.basicConfig(level="DEBUG",format='%(asctime)s [%(levelname)-8s,%(filename)-20s:%(lineno)-3d] %(message)s')
+
+RunTimer=True;
+conf=yc.yamlconfig(name)
+conf.linkdevices()
+conf.loaddrivers()
+conf.linkdrivers()
+
+def GetVal(name):
+ varid=conf.getvarid(name);
+# print("varid",varid)
+ var1=conf.getvars()[varid]
+ dim=var1['dim']
+ drv=var1.get('drivercls');
+ mask=[True]*dim#+[True]*N+[False]*((dim-RCUNR-1)*N);
+ data=drv.OPCUAReadVariable(varid,var1,mask)
+ data=data[0].data
+# N3=len(data[0])//dim
+ return data,var1
+
+
+def SetVal(name,data):
+ varid=conf.getvarid(name);
+# print("varid",varid)
+ var1=conf.getvars()[varid]
+ dim=var1['dim']
+ drv=var1.get('drivercls');
+ mask=[True]*dim#+[True]*N+[False]*((dim-RCUNR-1)*N);
+ return drv.OPCUASetVariable(varid,var1,data,mask)
+
+def SetReg(name,data,drvvar):
+ varid=conf.getvarid(drvvar)
+ var2=conf.getvars()[varid]
+ drv=var2.get('drivercls');
+ var1=conf.getdevreg(name);
+# print("Var",var1)
+# drv=var1.get('drivercls');
+# print("DRV",drv)
+ drv.Setdevreg(var1,data,[])
+
+
+
+#reading the ID also set the switch
+print("Get IDs")
+data,var1=GetVal(varID);
+print(data)
+data=np.array(data)[::4]
+mask=[not(d is None) for d in data]
+print(mask)
+#GetReg("GPIO3.
+#SetReg("IO3.GPIO1",[21]*32)
+#SetReg("IO3.GPIO2",[71]*32)
+
+#exit()
+data,var1=GetVal("RCU_IO1_GPIO1")
+data,var1=GetVal("RCU_IO1_GPIO2")
+data,var1=GetVal("RCU_IO2_GPIO1")
+data,var1=GetVal("RCU_IO2_GPIO2")
+
+if False:
+  SetVal("RCU_IO3_GPIO1",[0]*32)
+  SetVal("RCU_IO3_GPIO2",[0]*32)
+  SetVal("RCU_PWR_DIGITAL_on",[0]*32)
+  SetVal("RCU_PWR_DIGITAL_on",[1]*32)
+
+SetVal("RCU_IO3_GPIO1",[21]*32)
+SetVal("RCU_IO3_GPIO2",[71]*32)
+SetReg("IO3.CONF1",[0]*32,"RCU_IO3_GPIO1")
+SetReg("IO3.CONF2",[0]*32,"RCU_IO3_GPIO1")
+SetReg("IO3.POL1",[0]*32,"RCU_IO3_GPIO1")
+SetReg("IO3.POL2",[0]*32,"RCU_IO3_GPIO1")
+
+
+data,var1=GetVal("RCU_PWR_DIGITAL_on")
+print("RCU_PWR_DIGITAL_on",data)
+
+data,var1=GetVal("RCU_IO3_GPIO1")
+print("RCU_IO3_GPIO1",data)
+data,var1=GetVal("RCU_IO3_GPIO2")
+print("RCU_IO3_GPIO2",data)
+#print("Set Reg")
+#exit()
+#print("Read Reg")
+
+if False:
+  SetVal("RCU_ADC_shutdown",[1]*96)
+  SetVal("RCU_ADC_shutdown",[0]*96)
+data,var1=GetVal("RCU_ADC_shutdown")
+print("RCU_ADC_shutdown",data)
+
+if True: #SPI bus reset
+  SetVal("RCU_IO3_GPIO2",[0x40]*32) #bit0,1,2 = CS = Low
+  SetVal("RCU_IO3_GPIO1",[0x17]*32) #CLK high 
+  SetVal("RCU_IO3_GPIO1",[0x15]*32) #CLK low
+  SetVal("RCU_IO3_GPIO1",[0x17]*32) #CLK high
+  SetVal("RCU_IO3_GPIO1",[0x15]*32) #CLK low
+  SetVal("RCU_IO3_GPIO2",[0x47]*32) #CS = High
+#  for x in range(1):
+#     SetVal("RCU_IO3_GPIO1",[0x02]*32) #CLK high
+#     SetVal("RCU_IO3_GPIO1",[0x00]*32) #CLK low
+
+#  SetVal("RCU_IO3_GPIO1",[0x15]*32) #CLK low
+  time.sleep(1)
+
+SetReg("ADC2.test",[2]*32,regname)
+SetReg("ADC3.test",[3]*32,regname)
+SetReg("ADC1.test",[1]*32,regname)
+
+data,var1=GetVal(regname);
+data=np.array(data).reshape([32,3])
+print(data)
+#exit()
+for x in range(1,100):
+  print("Set reg",x)
+  SetReg("ADC3.test",[x+2]*32,regname)
+  SetReg("ADC2.test",[x+1]*32,regname)
+  SetReg("ADC1.test",[x]*32,regname)
+#  data=np.array([x]*96)
+#  SetVal(regname,data)
+
+#print("Read reg")
+  data,var1=GetVal(regname);
+  data=np.array(data).reshape([32,3])
+  print(data)
+
+
+exit()
+#ID=("%.2x%.2x%.2x%.2x" % (data[0],data[1],data[2],data[3]))
+