diff --git a/config/RCU.yaml b/config/RCU.yaml
index aac519d77a8d804ab74e462509ce18479d2d8c43..338f910f685d6fd7a091796029bd34b4fde1e439 100644
--- a/config/RCU.yaml
+++ b/config/RCU.yaml
@@ -266,6 +266,7 @@ variables:
rw: ro
dtype: double
dim: 32
+ monitor: true
- name: RCU_Pwr_dig
description: Enable LDOs
@@ -318,6 +319,7 @@ variables:
dtype: uint8
dim: 96
mask: Ant_mask
+ monitor: true
- name: RCU_dth1_freq
driver: I2C_RCU
diff --git a/config/UNB2.yaml b/config/UNB2.yaml
index deb05e0b90ef84cf2663c38eef44b0fba0fa20c5..0f39ecce392ca66e6f289c0f19fbe01ab289c39e 100644
--- a/config/UNB2.yaml
+++ b/config/UNB2.yaml
@@ -152,6 +152,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 2
+ monitor: true
- name: [UNB2_POL_QSFP_N01_VOUT,UNB2_POL_QSFP_N01_IOUT,UNB2_POL_QSFP_N01_TEMP,UNB2_POL_QSFP_N23_VOUT,UNB2_POL_QSFP_N23_IOUT,UNB2_POL_QSFP_N23_TEMP]
driver: switch_PS
@@ -162,6 +163,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 2
+ monitor: true
- name: [UNB2_POL_SWITCH_1V2_VOUT,UNB2_POL_SWITCH_1V2_IOUT,UNB2_POL_SWITCH_1V2_TEMP,UNB2_POL_SWITCH_PHY_VOUT,UNB2_POL_SWITCH_PHY_IOUT,UNB2_POL_SWITCH_PHY_TEMP]
driver: switch_PS
@@ -172,6 +174,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 2
+ monitor: true
- name: [UNB2_POL_CLOCK_VOUT,UNB2_POL_CLOCK_IOUT,UNB2_POL_CLOCK_TEMP]
driver: switch_PS
@@ -182,6 +185,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 2
+ monitor: true
##Local MP per FPGA node
- name: UNB2_FPGA_DDR4_SLOT_TEMP
@@ -194,6 +198,7 @@ variables:
dtype: double
scale: 0.0625
dim: 16
+ monitor: true
- name: UNB2_FPGA_DDR4_SLOT_PART_NUMBER
driver: switch_DDR4
@@ -203,6 +208,7 @@ variables:
rw: ro
dtype: string
dim: 16
+ monitor: true
- name: [UNB2_POL_FPGA_CORE_VOUT,UNB2_FPGA_POL_CORE_IOUT,UNB2_FPGA_POL_CORE_TEMP,UNB2_FPGA_POL_ERAM_VOUT,UNB2_FPGA_POL_ERAM_IOUT,UNB2_FPGA_POL_ERAM_TEMP]
driver: switch_FPGA_PS
@@ -213,6 +219,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 8
+ monitor: true
- name: [UNB2_FPGA_POL_RXGXB_VOUT,UNB2_FPGA_POL_RXGXB_IOUT,UNB2_FPGA_POL_RXGXB_TEMP,UNB2_FPGA_POL_TXGXB_VOUT,UNB2_FPGA_POL_TXGXB_IOUT,UNB2_POL_FPGA_TXGXB_TEMP]
driver: switch_FPGA_PS
@@ -223,6 +230,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 8
+ monitor: true
- name: [UNB2_FPGA_POL_HGXB_VOUT,UNB2_FPGA_POL_HGXB_IOUT,UNB2_FPGA_POL_HGXB_TEMP,UNB2_FPGA_POL_PGM_VOUT,UNB2_FPGA_POL_PGM_IOUT,UNB2_FPGA_POL_PGM_TEMP]
driver: switch_FPGA_PS
@@ -233,6 +241,7 @@ variables:
dtype: double
scale: 1.2207e-4 #2^-13
dim: 8
+ monitor: true
@@ -247,6 +256,7 @@ variables:
dtype: double
scale: 0.0625 #TBC
dim: 48
+ monitor: true
- name: UNB2_FPGA_QSFP_CAGE_LOS
description: Bits for 4 TX, 4 RX channels
@@ -257,6 +267,7 @@ variables:
rw: ro
dtype: uint8
dim: 48
+ monitor: true
methods:
diff --git a/opcuaserv/i2client.py b/opcuaserv/i2client.py
index 87ddab573bda93db1715bc3a7552f21c8cb7c7b1..b00d227a52297b16e43c29ff4962a926804b1427 100644
--- a/opcuaserv/i2client.py
+++ b/opcuaserv/i2client.py
@@ -28,6 +28,9 @@ class i2client():
Data=OPCUAset(id1,InstType.varSet,data,mask)
self.Qout.put(Data);
+ def QoutLength(self):
+ return self.Qout.qsize()
+
def callmethod(self,id1,mask=[]):
Data=OPCUAset(id1,InstType.method,[],mask)
self.Qout.put(Data);
diff --git a/opcuaserv/opcuaserv.py b/opcuaserv/opcuaserv.py
index 897a9438aa21152f48b2d640e8b1d9d932123879..9ce7c06b040fc286ee0eaafda0f80b64824579ff 100644
--- a/opcuaserv/opcuaserv.py
+++ b/opcuaserv/opcuaserv.py
@@ -68,8 +68,9 @@ def AddVarW(vname,varvalue2,v,Q1,debug):
obj=(DEBUGobj if debug else PCCobj)
myvar2 = obj.add_variable(idx, vname, varvalue2)
myvar2.set_writable()
- Vars_W[myvar2.nodeid.Identifier]=[vname,myvar2.get_data_value(),v,Q1]
- handle = sub.subscribe_data_change(myvar2)
+ if v:
+ Vars_W[myvar2.nodeid.Identifier]=[vname,myvar2.get_data_value(),v,Q1]
+ handle = sub.subscribe_data_change(myvar2)
return myvar2
def Addmethod(vname,v,Q1,debug):
diff --git a/opcuaserv/yamlreader.py b/opcuaserv/yamlreader.py
index 0697006a22c737e684938826379ae4e29bba01f9..380da019470cbcaa7913ffcb83ab2d9743c4c780 100644
--- a/opcuaserv/yamlreader.py
+++ b/opcuaserv/yamlreader.py
@@ -19,11 +19,14 @@ def int2bytes(i):
class yamlreader(yamlconfig):
def __init__(self,i2cserver,yamlfile='RCU'):
+ self.yamlfile=yamlfile;
yamlconfig.__init__(self,yamlfile)
self.server=i2cserver;
-
+ self.timecount=0;
+ self.monitorvarcnt=0;
def AddVars(self,AddVarR,AddVarW):
+ self.monitorvar=AddVarW(self.yamlfile+"_monitor_rate_RW",60,None,None,None)
for v in self.conf['variables']:
# print(v)
dim1=v.get('dim',1);
@@ -181,3 +184,19 @@ class yamlreader(yamlconfig):
logging.debug(str(("OPCset",v['name'],data3)))
v['OPCR'].set_value(data3);
+ def Monitor(self):
+ T1=self.monitorvar.get_value()*10;
+ if T1<=0: return;
+ self.timecount+=1;
+ while self.timecount>=T1:
+ if self.server.QoutLength()>3: return;
+ v=self.conf['variables'][self.monitorvarcnt];
+ if v.get('monitor'):
+ mask=(v['maskOPC'].get_value() if v.get('maskOPC') else [])
+# print("monitor",v['name'],mask)
+ self.server.readvar(self.monitorvarcnt,mask=mask)
+ self.monitorvarcnt+=1;
+ if self.monitorvarcnt>=len(self.conf['variables']):
+ self.monitorvarcnt=0;
+ self.timecount=0;
+
diff --git a/pypcc2.py b/pypcc2.py
index 2fadc3efd85a2db5c4681d7a5c54a8b59ccf6970..df8342006b8942a20da8e1874a0f36d262b91a1a 100644
--- a/pypcc2.py
+++ b/pypcc2.py
@@ -49,6 +49,7 @@ for name in I2Cports:
#Initialise OPCUA server and load variables
logging.info("Initialised OPC-UA Server")
+configs=[]
if not(args.test):
opcuaserv.InitServer(port=args.port)
logging.info("Load OPCUA variables & start i2c listing thread")
@@ -57,6 +58,7 @@ if not(args.test):
RCU_conf=yamlreader.yamlreader(RCU_I2C,yamlfile=name)
RCU_conf.AddVars(opcuaserv.AddVarR,opcuaserv.AddVarW)
RCU_conf.AddMethod(opcuaserv.Addmethod)
+ configs.append(RCU_conf);
thread2=threading.Thread(target=RCU_conf.getvar); #Thread on OPC-UA side of pipe
thread2.start()
@@ -72,7 +74,9 @@ if False:
try:
while RunTimer:
- time.sleep(1)
+ time.sleep(0.1);
+ for c in configs:
+ c.Monitor();
finally:
if not(args.test):
logging.info("Stop OPC-UA server")