From 97ca9743c6b0429be5f3dbc0f90e4c5e344d7cae Mon Sep 17 00:00:00 2001
From: kruger <kruger@astron.nl>
Date: Tue, 12 Jan 2021 22:12:37 +0100
Subject: [PATCH] HBA test variable added
---
clk/Vars.py | 6 +++---
pcctypes.py | 41 ++++++++++++++++++++++++++++++++++++++++-
rcu/HWconf.py | 6 ++++++
rcu/RCU.py | 2 +-
rcu/Vars.py | 40 +++++++++++++++++++++++++---------------
5 files changed, 75 insertions(+), 20 deletions(-)
diff --git a/clk/Vars.py b/clk/Vars.py
index 35d7660..4127783 100644
--- a/clk/Vars.py
+++ b/clk/Vars.py
@@ -1,8 +1,8 @@
from .HWconf import *
-CLK_IGNORE_PPS= VarArray("CLK_Ignore_PPS",1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,6,1)],RW.ReadOnly,datatype.dInt,None,None)
-CLK_Enable_PWR= VarArray("CLK_Enable_PWR",1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,7,1)],RW.ReadOnly,datatype.dInt,None,None)
-CLK_Stat1 = VarArray("CLK_Stat" ,1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,4,1)],RW.ReadOnly,datatype.dInt,None,None)
+CLK_IGNORE_PPS= VarArray("CLK_Ignore_PPS",1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,6,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+CLK_Enable_PWR= VarArray("CLK_Enable_PWR",1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,7,1)],RW.ReadOnly,datatype.dInt,1,None,None)
+CLK_Stat1 = VarArray("CLK_Stat" ,1,[Var2dev("",I2Cmodules.CLK,DevType.I2C,CLK_IO3_OUT1,1 ,4,1)],RW.ReadOnly,datatype.dInt,1,None,None)
OPC_devvars=[CLK_IGNORE_PPS,CLK_Enable_PWR,CLK_Stat1]
diff --git a/pcctypes.py b/pcctypes.py
index 8669628..02b266a 100644
--- a/pcctypes.py
+++ b/pcctypes.py
@@ -3,9 +3,21 @@ from collections import namedtuple
from enum import Enum
from recordclass import recordclass
+#I2C ports & Switch addresses of device
MPaddr=namedtuple("MPaddr","nI2C I2C nSwitch Switch");
+
+#Device registers
DevReg=namedtuple("DevReg","Addr Register_R Register_W store");
+#Addr: Byte (I2C) or *BBdev
+#Register_R/W: Byte (I2C register)
+#store: Byte 0=not stored else store index
+
+#Bitbang devices
BBdev=namedtuple("BBdev","nPins devs pins addr")
+# devs: *DevReg[nPins]
+# pins: Byte[nPins]
+# addr: Byte (SPI device address)
+
class I2Cmodules(Enum):
Switch = 0
@@ -21,6 +33,8 @@ class DevType(Enum):
Instr =4
VarUpdate = 5
Internal = 6
+ HBA1 = 7
+ HBA2 = 8
class RW(Enum):
Hidden = 0 #Not an OPC_UA variable
@@ -32,8 +46,33 @@ class datatype(Enum):
dInt = 0
dfloat = 1
+#Variable two device link
Var2dev=namedtuple("Var2dev","name module type devreg width bitoffset Scale")
-VarArray=recordclass("VarArray","name nVars Vars RW type OPCR OPCW") #OPCR and OPCW linked at runtime
+#name: string (Currently unused!)
+#module: I2Cmodules
+#Type: DevType
+#DevReg: *DevReg
+#Width: Byte (# of bits)
+#Bitoffset: Byte
+#Scale: Float (=1 means no scaling i.e. integer)
+#OPC-UA variable: Array of similar variables
+VarArray=recordclass("VarArray","name nVars Vars RW type size OPCR OPCW") #OPCR and OPCW linked at runtime
+#name: string
+#Vars: *Var2dev[nVars]
+#RW: RW
+#type: datatype
+#size: =nVars (default), but x16/32 for HBA antennas
+#OPCR/W: pointer to variable in OPC-UA server (linked during runtime)
+
+#Instruction
Instr=namedtuple("DevInstr","type dev nvalue value")
+#Type: DevType
+#dev: pointer to vararray / DevReg / etc depending on type
+#value: Bytes[nvalue]
+
+#List of instructions
Instrs=namedtuple("Instr","name ninstr instr")
+#name: string
+#inst: Instr[ninstr]
+
diff --git a/rcu/HWconf.py b/rcu/HWconf.py
index 0b00a7f..ebb642c 100644
--- a/rcu/HWconf.py
+++ b/rcu/HWconf.py
@@ -39,6 +39,12 @@ RCU_AN_Ch2=DevReg(0x14,0xB180,-1,0)
#etc
RCU_AN_Temp=DevReg(0x14,0xA0C0,-1,0)
+#HBA1
+RCU_HBA1=DevReg(0x41,0,0,1)
+RCU_HBA2=DevReg(0x42,0,0,2)
+RCU_HBA3=DevReg(0x43,0,0,3)
+
+
#Bitbang devices
#BBdev=namedtuple("BBdev","nPins devs pins addr")
I2CBB_dth3=BBdev(3,[RCU_IO1_OUT1,RCU_IO2_OUT2,RCU_IO2_CONF2],[6,3,3],0x70); #SCL,SDIO,SDIOdir
diff --git a/rcu/RCU.py b/rcu/RCU.py
index 93b325d..248790c 100644
--- a/rcu/RCU.py
+++ b/rcu/RCU.py
@@ -290,7 +290,7 @@ class RCU1():
def AddVars(self,Q1,AddVarR,AddVarW):
for v in Vars.OPC_devvars:
- dim=Vars.RCU_MPaddr.nI2C*Vars.RCU_MPaddr.nSwitch*v.nVars
+ dim=Vars.RCU_MPaddr.nI2C*Vars.RCU_MPaddr.nSwitch*v.size
#print(v.name,dim)
varvalue2=(dim*[0.0] if v.type==Vars.datatype.dfloat else dim*[0])
if v.RW in [Vars.RW.ReadOnly,Vars.RW.ReadWrite]:
diff --git a/rcu/Vars.py b/rcu/Vars.py
index f3b5de3..8b3877c 100644
--- a/rcu/Vars.py
+++ b/rcu/Vars.py
@@ -21,39 +21,49 @@ RCU_temp1=Var2dev("RCU_temp1",RCUmod,DevType.I2C,RCU_AN_Temp ,23,0,4.21e-3)
dummy=Var2dev("Dummy",RCUmod,DevType.Internal,None,8,0,1)
-Ant_mask=VarArray("Ant_mask" ,3,[dummy,dummy,dummy] ,RW.WriteOnly,datatype.dInt,None,None)
-RCU_att =VarArray("RCU_attenuator" ,3,[RCU_att1 ,RCU_att2 ,RCU_att3] ,RW.ReadWrite,datatype.dInt,None,None)
-RCU_band=VarArray("RCU_band" ,3,[RCU_band1,RCU_band2,RCU_band3],RW.ReadWrite,datatype.dInt,None,None)
+Ant_mask=VarArray("Ant_mask" ,3,[dummy,dummy,dummy] ,RW.WriteOnly,datatype.dInt,3,None,None)
+RCU_att =VarArray("RCU_attenuator" ,3,[RCU_att1 ,RCU_att2 ,RCU_att3] ,RW.ReadWrite,datatype.dInt,3,None,None)
+RCU_band=VarArray("RCU_band" ,3,[RCU_band1,RCU_band2,RCU_band3],RW.ReadWrite,datatype.dInt,3,None,None)
-RCU_mask=VarArray("RCU_mask" ,1,[dummy] ,RW.WriteOnly,datatype.dInt ,None,None)
-RCU_temp=VarArray("RCU_temperature",1,[RCU_temp1],RW.ReadOnly ,datatype.dfloat,None,None)
-RCU_pwrd=VarArray("RCU_Pwr_dig" ,1,[RCU_pwrd1],RW.ReadOnly ,datatype.dInt ,None,None)
-RCU_LED =VarArray("RCU_LED0" ,1,[RCU_led0] ,RW.ReadWrite,datatype.dInt ,None,None)
+RCU_mask=VarArray("RCU_mask" ,1,[dummy] ,RW.WriteOnly,datatype.dInt ,1,None,None)
+RCU_temp=VarArray("RCU_temperature",1,[RCU_temp1],RW.ReadOnly ,datatype.dfloat,1,None,None)
+RCU_pwrd=VarArray("RCU_Pwr_dig" ,1,[RCU_pwrd1],RW.ReadOnly ,datatype.dInt ,1,None,None)
+RCU_LED =VarArray("RCU_LED0" ,1,[RCU_led0] ,RW.ReadWrite,datatype.dInt ,1,None,None)
RCU_Dth3_freq=Var2dev("RCU_dth1_freq",RCUmod,DevType.I2Cbb,RCU_Dth3_Freq,32,0,1e-6)
RCU_Dth2_freq=Var2dev("RCU_dth1_freq",RCUmod,DevType.I2Cbb,RCU_Dth2_Freq,32,0,1e-6)
RCU_Dth1_freq=Var2dev("RCU_dth1_freq",RCUmod,DevType.I2Cbb,RCU_Dth1_Freq,32,0,1e-6)
-RCU_dth_freq=VarArray("RCU_dither_freq",3,[RCU_Dth1_freq,RCU_Dth2_freq,RCU_Dth3_freq],RW.ReadWrite,datatype.dfloat,None,None)
+RCU_dth_freq=VarArray("RCU_dither_freq",3,[RCU_Dth1_freq,RCU_Dth2_freq,RCU_Dth3_freq],RW.ReadWrite,datatype.dfloat,3,None,None)
+
+HBA1_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,5,2,1)
+HBA1_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA1,1,1,1)
+HBA2_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,5,2,1)
+HBA2_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA2,1,1,1)
+HBA3_Delay=Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,5,2,1)
+HBA3_Pwr =Var2dev("",RCUmod,DevType.HBA1,RCU_HBA3,1,1,1)
+HBA1_Delay=VarArray("HBA_element_beamformer_delays",3,[HBA1_Delay,HBA2_Delay,HBA3_Delay],RW.ReadWrite,datatype.dInt,96,None,None)
+HBA1_Pwr =VarArray("HBA_element_pwr" ,3,[HBA1_Pwr ,HBA2_Pwr ,HBA3_Pwr ],RW.ReadWrite,datatype.dInt,96,None,None)
+
RCU_ADC1_lock=Var2dev("RCU_ADC1_lock",RCUmod,DevType.SPIbb,RCU_ADC1_PLL_stat,8,0,1)
RCU_ADC2_lock=Var2dev("RCU_ADC2_lock",RCUmod,DevType.SPIbb,RCU_ADC2_PLL_stat,8,0,1)
RCU_ADC3_lock=Var2dev("RCU_ADC3_lock",RCUmod,DevType.SPIbb,RCU_ADC3_PLL_stat,8,0,1)
-RCU_ADC_lock=VarArray("RCU_ADC_lock",3,[RCU_ADC1_lock,RCU_ADC2_lock,RCU_ADC3_lock],RW.ReadOnly,datatype.dInt,None,None)
+RCU_ADC_lock=VarArray("RCU_ADC_lock",3,[RCU_ADC1_lock,RCU_ADC2_lock,RCU_ADC3_lock],RW.ReadOnly,datatype.dInt,3,None,None)
RCU_ADC1_SYNC=Var2dev("RCU_ADC1_SYNC",RCUmod,DevType.SPIbb,RCU_ADC1_SYNC_ctr,8,0,1)
RCU_ADC2_SYNC=Var2dev("RCU_ADC2_SYNC",RCUmod,DevType.SPIbb,RCU_ADC2_SYNC_ctr,8,0,1)
RCU_ADC3_SYNC=Var2dev("RCU_ADC3_SYNC",RCUmod,DevType.SPIbb,RCU_ADC3_SYNC_ctr,8,0,1)
-RCU_ADC_SYNC=VarArray("RCU_ADC_SYNC",3,[RCU_ADC1_SYNC,RCU_ADC2_SYNC,RCU_ADC3_SYNC],RW.ReadOnly,datatype.dInt,None,None)
+RCU_ADC_SYNC=VarArray("RCU_ADC_SYNC",3,[RCU_ADC1_SYNC,RCU_ADC2_SYNC,RCU_ADC3_SYNC],RW.ReadOnly,datatype.dInt,3,None,None)
RCU_ADC1_JESD=Var2dev("RCU_ADC1_SYNC",RCUmod,DevType.SPIbb,RCU_ADC1_JESD_ctr,8,0,1)
RCU_ADC2_JESD=Var2dev("RCU_ADC2_SYNC",RCUmod,DevType.SPIbb,RCU_ADC2_JESD_ctr,8,0,1)
RCU_ADC3_JESD=Var2dev("RCU_ADC3_SYNC",RCUmod,DevType.SPIbb,RCU_ADC3_JESD_ctr,8,0,1)
-RCU_ADC_JESD=VarArray("RCU_ADC_JESD",3,[RCU_ADC1_JESD,RCU_ADC2_JESD,RCU_ADC3_JESD],RW.ReadOnly,datatype.dInt,None,None)
+RCU_ADC_JESD=VarArray("RCU_ADC_JESD",3,[RCU_ADC1_JESD,RCU_ADC2_JESD,RCU_ADC3_JESD],RW.ReadOnly,datatype.dInt,3,None,None)
RCU_ADC1_CML=Var2dev("RCU_ADC1_SYNC",RCUmod,DevType.SPIbb,RCU_ADC1_CML_level,8,0,1)
RCU_ADC2_CML=Var2dev("RCU_ADC2_SYNC",RCUmod,DevType.SPIbb,RCU_ADC2_CML_level,8,0,1)
RCU_ADC3_CML=Var2dev("RCU_ADC3_SYNC",RCUmod,DevType.SPIbb,RCU_ADC3_CML_level,8,0,1)
-RCU_ADC_CML=VarArray("RCU_ADC_CML",3,[RCU_ADC1_CML,RCU_ADC2_CML,RCU_ADC3_CML],RW.ReadOnly,datatype.dInt,None,None)
+RCU_ADC_CML=VarArray("RCU_ADC_CML",3,[RCU_ADC1_CML,RCU_ADC2_CML,RCU_ADC3_CML],RW.ReadOnly,datatype.dInt,3,None,None)
RCU_IO1_1= Var2dev("" ,RCUmod,DevType.I2C,RCU_IO1_OUT1,8,0,1)
@@ -72,14 +82,14 @@ RCU_IO3_2= Var2dev("" ,RCUmod,DevType.I2C,RCU_IO3_OUT2,8,0,1)
#RCU_IO3_4= Var2dev("" ,RCUmod,DevType.I2C,RCU_IO3_CONF2,8,0,1)
#RCU_IO3=VarArray("RCU_IO3",3,[RCU_IO3_1,RCU_IO3_2,RCU_IO3_3],RW.ReadOnly,datatype.dInt,None,None)
-RCU_OUT1=VarArray("RCU_OUT1",3,[RCU_IO1_1,RCU_IO2_1,RCU_IO3_1],RW.ReadOnly,datatype.dInt,None,None)
-RCU_OUT2=VarArray("RCU_OUT2",3,[RCU_IO1_2,RCU_IO2_2,RCU_IO3_2],RW.ReadOnly,datatype.dInt,None,None)
+RCU_OUT1=VarArray("RCU_OUT1",3,[RCU_IO1_1,RCU_IO2_1,RCU_IO3_1],RW.ReadOnly,datatype.dInt,3,None,None)
+RCU_OUT2=VarArray("RCU_OUT2",3,[RCU_IO1_2,RCU_IO2_2,RCU_IO3_2],RW.ReadOnly,datatype.dInt,3,None,None)
#RCU_CNF1=VarArray("RCU_CONF1",3,[RCU_IO1_3,RCU_IO2_3,RCU_IO3_3],RW.ReadOnly,datatype.dInt,None,None)
#RCU_CNF2=VarArray("RCU_CONF2",3,[RCU_IO1_4,RCU_IO2_4,RCU_IO3_4],RW.ReadOnly,datatype.dInt,None,None)
-OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ADC_lock,RCU_ADC_SYNC,RCU_ADC_JESD,RCU_ADC_CML,RCU_OUT1,RCU_OUT2]#,RCU_CNF1,RCU_CNF2]
+OPC_devvars=[RCU_mask,Ant_mask,RCU_att,RCU_band,RCU_temp,RCU_pwrd,RCU_LED,RCU_ADC_lock,RCU_ADC_SYNC,RCU_ADC_JESD,RCU_ADC_CML,RCU_OUT1,RCU_OUT2,HBA1_Delay,HBA1_Pwr]#,RCU_CNF1,RCU_CNF2]
--
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