diff --git a/config/UNB2.yaml b/config/UNB2.yaml index 5ac65152df724826fc6d31bd083adf5d8d630d2f..c40f968c0c30859f0b6627bb17b0b58ad2273181 100644 --- a/config/UNB2.yaml +++ b/config/UNB2.yaml @@ -136,7 +136,7 @@ variables: driver: GPIO mask: UNB2_mask width: 1 - rw: ro + rw: hidden #ro dtype: boolean dim: 2 @@ -147,7 +147,7 @@ variables: devreg: FP_IO.GPIO bitoffset: 4 width: 3 - rw: rw + rw: hidden #rw dtype: uint8 dim: 2 @@ -155,7 +155,7 @@ variables: driver: switch_UNB2 devreg: 0x50.0 width: 80 #10 characters - rw: ro + rw: hidden #ro dtype: string dim: 2 @@ -171,7 +171,7 @@ variables: driver: switch_PS devreg: [0x2C.0x88,0x2C.0x8B,0x2C.0x8C,0x2C.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 2 @@ -181,7 +181,7 @@ variables: driver: switch_PS devreg: [0x2.0x8B,0x2.0x8C,0x2.0x8D,0x1.0x8B,0x1.0x8C,0x1.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 2 @@ -191,7 +191,7 @@ variables: driver: switch_PS devreg: [0xF.0x8B,0xF.0x8C,0xF.0x8D,0xE.0x8B,0xE.0x8C,0xE.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 2 @@ -201,7 +201,7 @@ variables: driver: switch_PS devreg: [0xD.0x8B,0xD.0x8C,0xD.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 2 @@ -213,7 +213,7 @@ variables: driver: switch_DDR4 devreg: [0x18.0x5,0x19.0x5] width: 13 - rw: ro + rw: hidden #ro dtype: double scale: 0.0625 dim: 16 @@ -223,7 +223,7 @@ variables: driver: switch_DDR4 devreg: [0x18.0x149,0x19.0x149] width: 160 - rw: ro + rw: hidden #ro dtype: string dim: 16 monitor: true @@ -232,7 +232,7 @@ variables: driver: switch_FPGA_PS devreg: [0x1.0x8B,0x1.0x8C,0x1.0x8D,0xD.0x8B,0xD.0x8C,0xD.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 8 @@ -242,7 +242,7 @@ variables: driver: switch_FPGA_PS devreg: [0xE.0x8B,0xE.0x8C,0xE.0x8D,0xF.0x8B,0xF.0x8C,0xF.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 8 @@ -252,7 +252,7 @@ variables: driver: switch_FPGA_PS devreg: [0x10.0x8B,0x10.0x8C,0x10.0x8D,0x11.0x8B,0x11.0x8C,0x11.0x8D] width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 1.2207e-4 #2^-13 dim: 8 @@ -266,7 +266,7 @@ variables: driver: switch_QSFP devreg: 0x50.0x16 width: 16 - rw: ro + rw: hidden #ro dtype: double scale: 0.0625 #TBC dim: 48 @@ -277,7 +277,7 @@ variables: driver: switch_QSFP devreg: 0x50.0x03 width: 8 - rw: ro + rw: hidden #ro dtype: uint8 dim: 48 monitor: true diff --git a/i2cserv/i2c_switch2.py b/i2cserv/i2c_switch2.py index e86b47cff9fa12144433358100be54c006260fb0..0d91bd0ccf06260921c541eeac23c695870356f8 100644 --- a/i2cserv/i2c_switch2.py +++ b/i2cserv/i2c_switch2.py @@ -12,6 +12,7 @@ class i2c_switch2(i2c): self.channel2=0 self.channel3=0 logging.info("i2c switch2 at address %i,%i,%i" % (self.SWaddr1,self.SWaddr2,self.SWaddr3)) + logging.warn("APSCT switch disabled for testing) def SetSW1(self,channelbit): channel=1<<(channelbit) @@ -20,7 +21,8 @@ class i2c_switch2(i2c): self.channel1=channel self.channel2=0 self.channel3=0 - return self.i2csetget(self.SWaddr1,[channel]) + return True; #testing without APSCT switch +# return self.i2csetget(self.SWaddr1,[channel]) def SetSW2(self,channelbit): channel=1<<(channelbit)