diff --git a/bin/ccdtr b/bin/ccdtr new file mode 100755 index 0000000000000000000000000000000000000000..dafcbb427d733c4ad3b660d4b2b4965f2576efcc --- /dev/null +++ b/bin/ccdtr @@ -0,0 +1,2 @@ +#!/bin/bash +hwtr -p 4843 -c CCDTR diff --git a/bin/ccdtr.service b/bin/ccdtr.service new file mode 100644 index 0000000000000000000000000000000000000000..aa891cc5e77d618522916e38ee2a5d5f18640a7b --- /dev/null +++ b/bin/ccdtr.service @@ -0,0 +1,10 @@ +[Unit] +Description=ccd translator +After=multi-user.target + +[Service] +Type=simple +ExecStart=ccdtr + +[Install] +WantedBy=multi-user.target diff --git a/pypcc/config/CCDTR.yaml b/pypcc/config/CCDTR.yaml new file mode 100644 index 0000000000000000000000000000000000000000..0d2b59f1fc40400d57b31764f792a662d482da02 --- /dev/null +++ b/pypcc/config/CCDTR.yaml @@ -0,0 +1,362 @@ +version: "1.0" +description: "1234" + +drivers: + - name: I2C + type: i2c + parameters: [1] #I2C port number + - name: I2C_CLK + type: i2c_dev #I2C devices + parent: I2C + status: CCDTR_I2C_error + - name: SPIbb1 + type: spibitbang2 #SPI bitbang via GPIO expander: CLK, SDI,SDO,CS + parent: I2C_CLK + devreg: [IO1.GPIO1,IO1.GPIO1,IO1.GPIO1,IO1.GPIO1] + parameters: [4,7,5,6] + +#This is the I2C devices in the RCU +device_registers: + - name: IO1 + description: IO-Expander + address: 0x20 + driver: I2C_CLK + registers: + - name: CONF1 + description: Direction of port1 + address: 6 + store: True + - name: CONF2 + description: Direction of port2 + address: 7 + store: True + - name: GPIO1 + description: Input/Ouput port 1 + address: [0,2] #Read / Write address different + store: True + - name: GPIO2 + description: Input/Ouput port 2 + address: [1,3] #Read / Write address different + store: True + + - name: PLL1 + driver: SPIbb1 + registers: + - name: PLL_stat + description: PLL locked status + address: 0x0 + - {name: r3, address: 0x03} + - {name: r5, address: 0x05} + - {name: r6, address: 0x06} + + - name: ROM + description: 24AA02UIDT + address: 0x50 + driver: I2C_CLK + registers: + - name: ID + description: Random + address: 0xfc + - name: Version + description: Set in production + address: 0 + - name: Serial + address: 0x20 + + - name: VSENSE + description: Monitor ADC + address: 0x74 + device: LTC2495 + driver: I2C_CLK + registers: + - name: V_0 + address: 0xB080 + wait: 250 + - name: V_1 + address: 0xB880 + wait: 250 + - name: V_2 + address: 0xB180 + wait: 250 + - name: V_3 + address: 0xB980 + wait: 250 + - name: V_4 + address: 0xB280 + wait: 250 + - name: V_5 + address: 0xBA80 + wait: 250 + - name: V_6 + address: 0xB380 + wait: 250 + - name: Temp + address: 0xA0C0 + wait: 250 + + - name: MAX + description: MAX6620 fan speed controller + address: 0x29 + driver: I2C_CLK + registers: + - { name: GLOBAL, address: 0x00} + - { name: TACH1, address: 0x10} + - { name: TACH2, address: 0x12} + - { name: TACH3, address: 0x14} + - { name: r2, address: 0x2} + - { name: r3, address: 0x3} + - { name: r4, address: 0x4} + - { name: r5, address: 0x5} + - { name: r6, address: 0x6} + - { name: r7, address: 0x7} + - { name: r8, address: 0x8} + + + +variables: + - name: CCDTR_I2C_error + description: 0=good, >0 indicates an I2C communication error + driver: I2C_CLK + rw: ro #server RW variable, not linked to IO + dtype: uint8 + + - name: CCDTR_monitor_rate + description: Monitor rate in seconds + rw: variable + dtype: uint8 + + - name: CCDTR_translator_busy + description: True when I2C line busy + rw: ro #server variable, not linked to IO + dtype: boolean + dim: 1 + + - name: CCD_PCB_ID + description: Unique PCB ID + driver: I2C_CLK + devreg: ROM.ID + width: 32 + rw: ro + dtype: uint32 + + - name: CCD_PCB_version + description: Version number + driver: I2C_CLK + devreg: ROM.Version + width: 0x80 #16 characters + rw: ro + dtype: string + + - name: CCD_PCB_number + description: PCB number (astron.nl/webforms/IenS-Boarden/view.php?id=xxx) + driver: I2C_CLK + devreg: ROM.Serial + width: 0x80 #16 characters + rw: ro + dtype: string + + +# - name: [CCD_PWR_PLL_200MHz_on,CCD_PWR_PLL_160MHz_on] +# description: CLK power status. Controlled by CCD_xxxMHz_ON and CCD_OFF +# rw: ro +# dtype: boolean +# driver: I2C_CLK +# devreg: [IO1.GPIO1,IO2.GPIO1] +# bitoffset: 1 +# width: 1 + + - name: CCD_PWR_on +# description: CLK power status. Controlled by CCD_xxxMHz_ON and CCD_OFF + rw: ro + dtype: boolean + driver: I2C_CLK + devreg: IO1.GPIO2 + bitoffset: 4 + width: 1 + +# - name: CCD_PPS_ignore +# rw: rw +# dtype: boolean +# driver: I2C_CLK +# devreg: IO1.GPIO2 +# bitoffset: 2 +# width: 1 + + - name: [CCD_INPUT_10MHz_good,CCD_INPUT_PPS_good] + rw: ro + dtype: boolean + driver: I2C_CLK + devreg: IO1.GPIO2 + bitoffset: [0,1] + width: 1 + monitor: true + + + - name: CCD_PLL_locked +# description: First status pin give lock status# + rw: ro + dtype: boolean + monitor: true + driver: I2C_CLK + devreg: IO1.GPIO1 + bitoffset: 2 + width: 1 + + - name: CCD_loss_lock + rw: ro + dtype: boolean + monitor: true + driver: I2C_CLK + devreg: IO1.GPIO2 + bitoffset: 2 + width: 1 + + - name: CCD_clear_lock + rw: rw + dtype: boolean + driver: I2C_CLK + devreg: IO1.GPIO2 + bitoffset: 5 + width: 1 + + - name: CCD_PLL_locked_SPI + description: 0x81=locked + driver: I2C_CLK + devreg: PLL1.PLL_stat + width: 8 + rw: ro + dtype: uint8 + debug: True + + - name: [CCD_IO1_GPIO1,CCD_IO1_GPIO2] + driver: I2C_CLK + devreg: [IO1.GPIO1,IO1.GPIO2] + width: 8 + rw: ro + dtype: uint8 + debug: True + + + - name: CCD_TEMP + description: Temperature sensor on PCB + driver: I2C_CLK + devreg: VSENSE.Temp + width: 23 + scale: 3.8265e-3 + convert_unit: Kelvin2Celsius + rw: ro + dtype: double + monitor: true + + - name: [CCD_PWR_CLK_INPUT_3V3,CCD_PWR_PLL_INPUT_3V3,CCD_PWR_OCXO_INPUT_3V3,CCD_PWR_CLK_DIST_3V3,CCD_PWR_PPS_INPUT_3V3,CCD_PWR_PPS_OUTPUT_3V3,CCD_PWR_CTRL_3V3] + driver: I2C_CLK + devreg: [VSENSE.V_0,VSENSE.V_1,VSENSE.V_2,VSENSE.V_3,VSENSE.V_4,VSENSE.V_5,VSENSE.V_6] + width: 23 + scale: 1.12165e-6 + rw: ro + dtype: double + monitor: true + + - name: CCD_FAN_RPM + driver: I2C_CLK + devreg: MAX.TACH1 +# bitoffset: 5 + width: 16 + rw: ro + dtype: double +# scale: 1.52588e-5 #FAN_TACHS/TACH_COUNT_FREQ/TACH_PERIODS = 1/8192/16 *2 (bitoffset=5) - not working correctly + scale: 4.7684e-7 #FAN_TACHS/TACH_COUNT_FREQ/TACH_PERIODS = 1/8192/16 /16 (bitoffset=0) + convert_unit: period2RPM + monitor: true + + +methods: + - name: CCDTR_Init #Called after startup to load. Should have all stored registers + driver: I2C_CLK + debug: True + instructions: + - CCDTR_I2C_error : 0 + - CCD_IO1_GPIO1 : Update + - CCD_IO1_GPIO2 : Update + - IO1.CONF1: Update + - IO1.CONF2: Update +# - CCDTR_Update: 0 + - CCD_on: 0 + + - name: CCDTR_Update + driver: I2C_CLK + debug: True + instructions: +# - CCD_PCB_ID : Update +# - CCD_PCB_version : Update +# - CCD_PCB_number : Update + - CCD_PWR_on: Update + - CCD_INPUT_10MHz_good: Update + - CCD_INPUT_PPS_good: Update + - CCD_PLL_locked: Update + - CCD_loss_lock: Update + - CCD_clear_lock: Update + + + - name: CCD_on + driver: I2C_CLK + description: Configure clock. Monitored using CCD_PWR_on + instructions: + - CCDTR_I2C_error : 0 + - IO1.CONF1: 0x2C #0010 1100 SCLK,CS,SDI + - IO1.CONF2: 0xE7 #1110,0111 + - IO1.GPIO1: 0x02 # + - IO1.GPIO2: 0x14 #PWR enable + - MAX.0x00 : 0x00 + - MAX.0x02 : 0x08 + - MAX.0x01 : 0x0F + - MAX.0x06 : 0x60 + - MAX.0x28 : 227 + - MAX.0x29 : 0x80 + + - WAIT: 200 + - CCD_PLL_setup: 0 + - WAIT: 200 #ms to wait before checking lock + - CCDTR_Update: 0 #refresh all settings + + - name: CCD_off + driver: I2C_CLK + description: Switch clock off. Monitored using CCD_PWR_on + instructions: + - CCDTR_I2C_error : 0 + - IO1.GPIO1: 0x00 + - IO1.GPIO2: 0x00 + - MAX.0x00 : 0x10 + - MAX.0x02 : 0x08 + - MAX.0x28 : 0x00 + - MAX.0x29 : 0x00 + - CCDTR_Update: 0 #refresh all settings + + - name: CCD_PLL_setup + driver: I2C_CLK + debug: true + instructions: + - PLL1.0x03: 0x08 #Set power, this is default + - PLL1.0x04: 0xFF # + - PLL1.0x05: 0xD7 # + - PLL1.0x06: 0xE0 + + - PLL1.0x07: 0x04 #Stop R divider + - PLL1.0x08: 0x01 #Set R divider + - PLL1.0x07: 0x00 #Start R divider + + - PLL1.0x09: 0x10 #Stop N divider + - PLL1.0x0A: 0x01 #Set N divider=1 + - PLL1.0x09: 0x00 #Start N divider + + - PLL1.0x0B: 0x00 # + - PLL1.0x0D: 0x01 #Divider output 1=1 + - PLL1.0x0E: 0x00 # + - PLL1.0x0F: 0x01 #Divider output 2=1 + - PLL1.0x11: 0x01 #Divider output 3=1 + - PLL1.0x12: 0x00 # + - PLL1.0x13: 0x01 #Divider output 4=1 + - PLL1.0x14: 0x01 # + + + diff --git a/setup.cfg b/setup.cfg index 6d6a380d9e53358161ce7068c02ea7d80737b714..4f53dd44ab5bcff1ad2c7c276e12e8937c4ebfd9 100644 --- a/setup.cfg +++ b/setup.cfg @@ -17,6 +17,7 @@ scripts = bin/unb2tr bin/apscttr bin/recvtr bin/apsputr + bin/ccdtr [options.packages.find] where=.