From 26d8814a10109a6848aa3459b6e4a770687f6734 Mon Sep 17 00:00:00 2001
From: kruger <kruger@astron.nl>
Date: Tue, 6 Aug 2024 12:39:16 +0100
Subject: [PATCH] ADC preemp added
---
pypcc/config/RECVTR_HB.yaml | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/pypcc/config/RECVTR_HB.yaml b/pypcc/config/RECVTR_HB.yaml
index 0e8a758..52745e3 100644
--- a/pypcc/config/RECVTR_HB.yaml
+++ b/pypcc/config/RECVTR_HB.yaml
@@ -200,6 +200,9 @@ device_registers:
- name: CML_level
description: CML output adjust
address: 0x15
+ - name: PREEM
+ description: Set Peemphasis on
+ address: 0xA8
- name: Update
description: Global device uptate
address: 0xFF
@@ -612,6 +615,16 @@ variables:
dim2: [3,32]
debug: true
+ - name: RCU_ADC_PREEM
+ driver: I2C_RCU
+ devreg: [ADC1.PREEM,ADC2.PREEM,ADC3.PREEM]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 96
+ dim2: [3,32]
+ debug: true
+
- name: RCU_DTH_freq
description: RCU Dither source frequency (Hz). Should be around 102MHz.
driver: I2C_RCU
@@ -913,7 +926,8 @@ methods:
instructions:
- ADC1.JESD_control1 : 0x14
- ADC1.SYNC_control: 1 #Setup ADCs
- - ADC1.CML_level: 0x7
+ - ADC1.CML_level: 0x5
+ - ADC1.PREEM: 0x14
- ADC1.dither : 0x00
- ADC1.Update: 1 #Needed to update ADC registers
@@ -924,7 +938,8 @@ methods:
instructions:
- ADC2.JESD_control1 : 0x14
- ADC2.SYNC_control: 1 #Setup ADCs
- - ADC2.CML_level: 0x7
+ - ADC2.CML_level: 0x5
+ - ADC2.PREEM: 0x14
- ADC2.dither : 0x00
- ADC2.Update: 1 #Needed to update ADC registers
@@ -935,7 +950,8 @@ methods:
instructions:
- ADC3.JESD_control1 : 0x14
- ADC3.SYNC_control: 1 #Setup ADCs
- - ADC3.CML_level: 0x7
+ - ADC3.CML_level: 0x5
+ - ADC3.PREEM: 0x14
- ADC3.dither : 0x00
- ADC3.Update: 1 #Needed to update ADC registers
--
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