diff --git a/pypcc/config/RECVTR_HB.yaml b/pypcc/config/RECVTR_HB.yaml index 026a0e300756864dd95bbe9e5ac8d2c6cabb50dc..9af3bb6cd1f4e1e6dcf4f030abda1a6725d9c95e 100644 --- a/pypcc/config/RECVTR_HB.yaml +++ b/pypcc/config/RECVTR_HB.yaml @@ -672,7 +672,7 @@ variables: dim: 3072 dim2: [32,96] mask: ANT_mask - wait: 100 #ms + wait: 1000 - name: HBAT_PWR_LNA_on description: HBA frontend control driver: I2C_HBAT @@ -684,7 +684,7 @@ variables: dim: 3072 dim2: [32,96] mask: ANT_mask - wait: 100 #ms + wait: 1000 - name: HBAT_PWR_on description: HBA frontend control driver: I2C_HBAT @@ -697,7 +697,7 @@ variables: dim: 3072 dim2: [32,96] mask: ANT_mask - wait: 100 #ms + wait: 1000 methods: - name: RECVTR_Init #Called after startup to load. Should have all stored registers diff --git a/pypcc/i2cserv/hba1.py b/pypcc/i2cserv/hba1.py index 9ab8b63e9201ac9b1cac1b9f6e3acde48a97b2f6..1e03b68c4f349ac3b083e9224af207af35846342 100644 --- a/pypcc/i2cserv/hba1.py +++ b/pypcc/i2cserv/hba1.py @@ -31,9 +31,9 @@ class hba1(hwdev): RCUmask=[(mask[i*3] | mask[i*3+1] | mask[i*3+2]) for i in range(32)] # print(RCUmask) #Wait for PPS if required else wait a bit + self.conf['parentcls'].SetSwitchMask(RCUmask) if var1.get('wait')=="PPS": logging.info("HBA wait PPS") - self.conf['parentcls'].SetSwitchMask(RCUmask) channel=GPIO.wait_for_edge(self.pin,GPIO.RISING,timeout=1500) self.conf['parentcls'].i2csetget(self.addr,[self.reg]) if channel is None: @@ -41,8 +41,14 @@ class hba1(hwdev): sleep(1.0) # return False; elif var1.get('wait'): - logging.debug("Wait %i ms",var1.get('wait')) - sleep(var1['wait']/1000.) + self.conf['parentcls'].i2csetget(self.addr,[self.reg]) + logging.debug("Wait %i ms",var1.get('wait')) + try: + sleep(float(var1.get('wait'))/1000.) + except: + logging.warning("HBAT1 wait not a number"+str((var1.get('wait')))); + else: + self.conf['parentcls'].i2csetget(self.addr,[self.reg]) data,mask2=self.conf['parentcls'].GetVarValueMask(var1,mask) Data=OPCUAset(varid,InstType.varSet,data.copy(),mask2.copy()) return [Data]