diff --git a/config/RCUL.yaml b/config/RCUL.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..2ba1f015b44fe2aa11ea782ce4392d571d705f16
--- /dev/null
+++ b/config/RCUL.yaml
@@ -0,0 +1,537 @@
+version: "1.0"
+description: "1234"
+
+drivers:
+ - name: I2C1 #TCA9548
+ type: i2c_switch
+ devreg: [0x70] #0x70 / 0x00=disabled
+ parameters: [1] #I2C port number
+ - name: I2C_RCU
+ type: i2c_array #An array of similar devices connected to an I2C switch
+ parent: I2C1
+ parameters: [0,31] #start,number of RCUs
+ status: RCU_I2C_STATUS
+ - name: I2Cbb1
+ type: i2cbitbang1 #I2C bitbang via GPIO expander
+ devreg: [IO3.GPIO2,IO3.GPIO2,IO3.CONF2]
+ parameters: [5,6,6] #pins
+ parent: I2C_RCU
+ - name: I2Cbb2
+ type: i2cbitbang1
+ devreg: [IO3.GPIO2,IO3.GPIO2,IO3.CONF2]
+ parameters: [4,6,6]
+ parent: I2C_RCU
+ - name: I2Cbb3
+ type: i2cbitbang1
+ devreg: [IO3.GPIO2,IO3.GPIO2,IO3.CONF2]
+ parameters: [3,6,6]
+ parent: I2C_RCU
+ - name: SPIbb1
+ type: spibitbang1 #SPI bitbang via GPIO expander: CLK, SDIO, SDIOdir,CS
+ devreg: [IO3.GPIO1,IO3.GPIO1,IO3.CONF1,IO3.GPIO2]
+ parameters: [1,0,0,0]
+ parent: I2C_RCU
+ - name: SPIbb2
+ type: spibitbang1
+ devreg: [IO3.GPIO1,IO3.GPIO1,IO3.CONF1,IO3.GPIO2]
+ parameters: [3,2,2,1]
+ parent: I2C_RCU
+ - name: SPIbb3
+ type: spibitbang1
+ devreg: [IO3.GPIO1,IO3.GPIO1,IO3.CONF1,IO3.GPIO2]
+ parameters: [5,4,4,2]
+ parent: I2C_RCU
+
+#This is the I2C devices in the RCU
+device_registers:
+ - name: IO
+ dim: 3
+ description: [IO-Expander for filter selection,IO-Expander for ON/OFF, Band, BUFx2,IO-Expander for ADC control]
+ address: [0x75,0x76,0x20]
+ device: [TCA9539,TCA9539,TCA6416]
+ driver: I2C1
+ registers:
+ - name: CONF1
+ description: Direction of port1
+ address: 6
+ store: True
+ - name: CONF2
+ description: Direction of port2
+ address: 7
+ store: True
+ - name: GPIO1
+ description: Input/Ouput port 1
+ address: [0,2] #Read / Write address different
+ store: True
+ - name: GPIO2
+ description: Input/Ouput port 2
+ address: [1,3]
+ store: True
+
+ - name: ROM
+ description: IO-Expander for filter selection
+ address: 0x50
+ driver: I2C1
+ registers:
+ - name: ID
+ description: Random
+ address: 0xfc
+ - name: Version
+ description: Set in production
+ address: 0
+
+ - name: AN
+ description: Monitor ADC on RCU
+ address: 0x74
+ device: LTC2495
+ driver: I2C1
+ registers:
+ - name: V_1v8
+ address: 0xB080
+ - name: V_2v5
+ address: 0xB880
+ - name: V_3v3
+ address: 0xB180
+ - name: I_Ant0
+ address: 0xB980
+ - name: I_Ant1
+ address: 0xB280
+ - name: I_Ant2
+ address: 0xBA80
+ - name: V_Ant_I0
+ address: 0xB380
+ - name: V_Ant_O0
+ address: 0xBB80
+ - name: V_Ant_I1
+ address: 0xB480
+ - name: V_Ant_O1
+ address: 0xBC80
+ - name: V_Ant_I2
+ address: 0xB580
+ - name: V_Ant_O2
+ address: 0xBD80
+ - name: Temp
+ address: 0xA0C0
+
+#This 'special' devices that uses I2C
+
+ - name: HB_UC
+ description: RCU microcontroller
+ address: 0x40
+ driver: I2C1
+ registers:
+ - name: ID
+ description: Device ID
+ address: 0
+
+ - name: ADC
+ dim: 3
+ description: ADC SPI control
+ device: AD9683
+ driver: [SPIbb1,SPIbb2,SPIbb3]
+ registers:
+ - name: PLL_stat
+ description: PLL locked status
+ address: 0x0A
+ - name: JESD_control1
+ description: JESD link control
+ address: 0x5F
+ - name: SYNC_control
+ address: 0x3A
+ - name: CML_level
+ description: CML output adjust
+ address: 0x15
+ - name: Offset
+ address: 0x10
+ - name: Update
+ description: Global device uptate
+ address: 0xFF
+
+ - name: DTH
+ dim: 3
+ description: CW dither source
+ device: SI4012
+ driver: [I2Cbb1,I2Cbb1,I2Cbb1]
+ address: 0x70
+ registers:
+ - name: Freq
+ description: Frequency
+ address: [0x1240,0x1140]
+ - name: Property
+ description: Properties
+ address: [0x12,0x11]
+ - name: Start
+ description: Start CW
+ address: [0x62,0x62]
+ - name: Stop
+ description: Stop CW
+ address: [0x67,0x67]
+ - name: Rev
+ address: 0x10
+
+variables:
+ - name: Ant_mask
+ description: Only masked RF chains are updated
+ driver: I2C_RCU
+ rw: variable #server RW variable, not linked to IO
+ dtype: boolean
+ dim: 96
+
+ - name: RCU_mask
+ description: Only masked RCUs are updated
+ driver: I2C_RCU
+ rw: variable #server RW variable, not linked to IO
+ dtype: boolean
+ dim: 32
+
+ - name: RCU_I2C_STATUS
+ description: 0=Good, 1=No communication, 2=error
+ driver: I2C_RCU
+ rw: ro #server RW variable, not linked to IO
+ dtype: uint8
+ mask: RCU_mask
+ dim: 32
+
+# - name: RCU_state
+# description: State of RCUs 0=unknown, 1=ready, 2=busy, 3= wait PPS, 4=error
+# driver: I2C_RCU
+# rw: ro #server variable, not linked to IO
+# dtype: uint8
+# dim: 1
+
+ - name: RCU_translator_busy
+ description: False when idle
+ rw: ro #server variable, not linked to IO
+ dtype: boolean
+ dim: 1
+
+ - name: RCU_attenuator
+ description: Attenuator before ADC
+ driver: I2C_RCU
+ devreg: [IO1.GPIO1,IO1.GPIO2,IO2.GPIO1]
+ bitoffset: [0,0,0]
+ width: 5
+ rw: rw
+ dtype: uint8
+ dim: 96
+ mask: Ant_mask
+
+ - name: RCU_band
+ description: Band select switch 1=10MHz,2=30MHz
+ driver: I2C_RCU
+ devreg: [IO2.GPIO2,IO2.GPIO2,IO2.GPIO2]
+ bitoffset: [0,2,4]
+ width: 2
+ rw: rw
+ dtype: uint8
+ dim: 96
+ mask: Ant_mask
+
+ - name: [RCU_IO1_GPIO1,RCU_IO1_GPIO2,RCU_IO2_GPIO1,RCU_IO2_GPIO2,RCU_IO3_GPIO1,RCU_IO3_GPIO2]
+ driver: I2C_RCU
+ devreg: [IO1.GPIO1,IO1.GPIO2,IO2.GPIO1,IO2.GPIO2,IO3.GPIO1,IO3.GPIO2]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 32
+ mask: RCU_mask
+ debug: True
+
+ - name: RCU_LED0
+ driver: I2C_RCU
+ description: LED on RCU
+ devreg: IO2.GPIO2
+ bitoffset: 6
+ width: 1
+ rw: rw
+ dtype: boolean
+ dim: 32
+ mask: RCU_mask
+
+ - name: RCU_LED1
+ driver: I2C_RCU
+ description: LED on RCU
+ devreg: IO2.GPIO2
+ bitoffset: 7
+ width: 1
+ rw: rw
+ dtype: boolean
+ dim: 32
+ mask: RCU_mask
+
+ - name: RCU_temperature
+ description: Temperature sensor on RCU
+ driver: I2C_RCU
+ devreg: AN.Temp
+ width: 23
+ scale: 3.8265e-3
+ rw: ro
+ dtype: double
+ dim: 32
+ monitor: true
+ mask: RCU_I2C_STATUS
+
+ - name: RCU_3V3
+ driver: I2C_RCU
+ devreg: AN.V_3v3
+ width: 23
+ scale: 1.463e-6
+ rw: ro
+ dtype: double
+ dim: 32
+# monitor: true
+ mask: RCU_I2C_STATUS
+
+ - name: RCU_1V8
+ driver: I2C_RCU
+ devreg: AN.V_1v8
+ width: 23
+ scale: 7.1526e-7
+ rw: ro
+ dtype: double
+ dim: 32
+# monitor: true
+ mask: RCU_I2C_STATUS
+
+ - name: RCU_2V5
+ driver: I2C_RCU
+ devreg: AN.V_2v5
+ width: 23
+ scale: 7.1526e-7
+ rw: ro
+ dtype: double
+ dim: 32
+# monitor: true
+ mask: RCU_I2C_STATUS
+
+ - name: ANT_Vout
+ driver: I2C_RCU
+ devreg: [AN.V_Ant_O0,AN.V_Ant_O1,AN.V_Ant_O2]
+ width: 23
+ scale: 2.7895e-6
+ rw: ro
+ dtype: double
+ dim: 96
+ mask: Ant_mask
+
+ - name: ANT_Vin
+ driver: I2C_RCU
+ devreg: [AN.V_Ant_I0,AN.V_Ant_I1,AN.V_Ant_I2]
+ width: 23
+ scale: 2.7895e-6
+ rw: ro
+ dtype: double
+ dim: 96
+ mask: Ant_mask
+
+ - name: ANT_I
+ driver: I2C_RCU
+ devreg: [AN.I_Ant0,AN.I_Ant1,AN.I_Ant2]
+ width: 23
+ scale: 7.1526e-8
+ rw: ro
+ dtype: double
+ dim: 96
+ mask: Ant_mask
+
+ - name: RCU_Pwr_dig
+ description: Enable LDOs
+ driver: I2C_RCU
+ devreg: IO2.GPIO1
+ width: 1
+ bitoffset: 6
+ rw: ro
+ dtype: boolean
+ dim: 32
+ mask: RCU_mask
+
+
+
+ - name: RCU_ID
+ description: Unique RCU ID
+ driver: I2C_RCU
+ devreg: ROM.ID
+ width: 32
+ rw: ro
+ dtype: uint32
+ dim: 32
+ mask: RCU_mask
+
+ - name: RCU_version
+ description: RCU version number
+ driver: I2C_RCU
+ devreg: ROM.Version
+ width: 80 #10 characters
+ rw: ro
+ dtype: string
+ dim: 32
+ mask: RCU_mask
+
+ - name: RCU_ADC_lock
+ description: 0x81=locked
+ driver: I2C_RCU
+ devreg: [ADC1.PLL_stat,ADC2.PLL_stat,ADC3.PLL_stat]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 96
+ monitor: true
+
+ - name: RCU_ADC_sync
+ driver: I2C_RCU
+ devreg: [ADC1.SYNC_control,ADC2.SYNC_control,ADC3.SYNC_control]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 96
+ debug: true
+
+ - name: RCU_ADC_JESD
+ driver: I2C_RCU
+ devreg: [ADC1.JESD_control1,ADC2.JESD_control1,ADC3.JESD_control1]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 96
+ debug: true
+
+ - name: RCU_ADC_CML_level
+ driver: I2C_RCU
+ devreg: [ADC1.CML_level,ADC2.CML_level,ADC3.CML_level]
+ width: 8
+ rw: ro
+ dtype: uint8
+ dim: 96
+ debug: true
+
+ - name: RCU_DTH_freq
+ driver: I2C_RCU
+ devreg: [DTH1.Freq,DTH2.Freq,DTH3.Freq]
+ width: 32
+ rw: rw
+ dtype: uint32
+ dim: 96
+ mask: Ant_mask
+
+ - name: RCU_DTH_Rev
+ driver: I2C_RCU
+ devreg: [DTH1.Rev,DTH2.Rev,DTH3.Rev]
+ width: 88
+ rw: rw
+ dtype: uint32
+ dim: 96
+ mask: Ant_mask
+
+methods:
+ - name: RCU_Init #Called after startup to load. Should have all stored registers
+ driver: I2C_RCU
+ debug: True
+ instructions:
+ - RCU_IO1_GPIO1: Update
+ - RCU_IO1_GPIO2: Update
+ - RCU_IO2_GPIO1: Update
+ - RCU_IO2_GPIO2: Update
+ - RCU_IO3_GPIO1: Update
+ - RCU_IO3_GPIO2: Update
+# - IO1.GPIO2: Update
+# - IO2.GPIO1: Update
+# - IO2.GPIO2: Update
+# - IO3.GPIO1: Update
+# - IO3.GPIO2: Update
+ - IO3.CONF1: Update
+ - RCU_update: 0
+
+ - name: RCU_SETUP_IO1
+ driver: I2C_RCU
+ mask: RCU_mask
+ rw: hidden
+ instructions:
+ - IO2.CONF1: 0 #Set device register, can also specify a register adress direction e.g. OIO2.0: 0
+ - IO2.GPIO1: 0x4A
+ - IO2.GPIO2: 0x55
+ - IO1.GPIO1: 0xCA
+ - IO1.GPIO2: 0xCA
+ - IO2.CONF2: 0
+ - IO1.CONF1: 0
+ - IO1.CONF2: 0
+
+ - name: RCU_on
+ driver: I2C_RCU
+ mask: RCU_mask
+ instructions:
+ - RCU_I2C_STATUS: 0
+ - RCU_SETUP_IO1: 0
+ - IO3.GPIO1: 0x15
+ - IO3.GPIO2: 0x47
+ - IO3.CONF1: 0
+ - IO3.CONF2: 0
+# - RCU_GPIO1: Update
+# - RCU_GPIO2: Update
+# - RCU_attenuator: [10,10,10] #Set OPC-UA variable
+ - WAIT: 500 #ms to wait
+ - ADC1_on: 0 #call another opc-ua method
+ - ADC2_on: 0
+ - ADC3_on: 0
+ - WAIT: 500 #ms to wait
+ - RCU_update: 0
+
+ - name: RCU_update
+ driver: I2C_RCU
+ mask: RCU_mask
+ debug: True
+ instructions:
+ - RCU_Pwr_dig: Update #Read value and update the OPC-UA variable
+ - RCU_ID: Update
+ - RCU_version: Update
+ - RCU_LED0: Update
+ - RCU_attenuator: Update
+ - RCU_band: Update
+ - RCU_ADC_lock: Update
+ - RCU_ADC_sync: Update
+
+
+ - name: ADC1_on
+ driver: I2C_RCU
+ debug: True
+# rw: hidden
+ instructions:
+ - ADC1.JESD_control1 : 0x14
+ - ADC1.SYNC_control: 1 #Setup ADCs
+ - ADC1.CML_level: 0x7
+ - ADC1.Update: 1 #Needed to update ADC registers
+
+ - name: ADC2_on
+ driver: I2C_RCU
+ debug: True
+# rw: hidden
+ instructions:
+ - ADC2.JESD_control1 : 0x14
+ - ADC2.SYNC_control: 1 #Setup ADCs
+ - ADC2.CML_level: 0x7
+ - ADC2.Update: 1 #Needed to update ADC registers
+
+ - name: ADC3_on
+ driver: I2C_RCU
+ debug: True
+# rw: hidden
+ instructions:
+ - ADC3.JESD_control1 : 0x14
+ - ADC3.SYNC_control: 1 #Setup ADCs
+ - ADC3.CML_level: 0x7
+ - ADC3.Update: 1 #Needed to update ADC registers
+
+ - name: RCU_off
+ driver: I2C_RCU
+ mask: RCU_mask
+ instructions:
+ - RCU_I2C_STATUS: 0
+ - RCU_Pwr_dig: 0 #Switch power off
+ - IO2.GPIO1: 0
+ - IO2.GPIO2: 0
+ - IO3.GPIO1: 0
+ - IO3.GPIO2: 0
+ - IO1.GPIO1: 0
+ - IO1.GPIO2: 0
+ - RCU_update: 0
+ #todo, also make all GPIO pins (except power enables) inputs to remove all power from devices.
+
diff --git a/i2cserv/i2c_array.py b/i2cserv/i2c_array.py
index bb0dd699c23863c5f007862c5072e5eda00bbe63..41c4d8823e1057017080128bb05948b1b92dca94 100644
--- a/i2cserv/i2c_array.py
+++ b/i2cserv/i2c_array.py
@@ -201,7 +201,8 @@ class i2c_array(i2c_dev):
# print(width,bitoffset,l1)
value2=value
reg=devreg['register_R']
- if reg>255: #This is for the monitor ADC
+ if reg>255: #This is for the monitor ADC (+ DTH)
+ callback(0,[250],read=3)
if not(callback(devreg['addr'],int2bytes(reg),read=2)): return False;
callback(0,[250],read=3)
if not(callback(devreg['addr'],value2,read=1)): return False;
diff --git a/i2cserv/i2c_switch.py b/i2cserv/i2c_switch.py
index fc59cf5bfd9e2ab206b394f4aaf9f794d6e4153e..c77bb902b3f0c194901f395e0006adb4388249c4 100644
--- a/i2cserv/i2c_switch.py
+++ b/i2cserv/i2c_switch.py
@@ -8,7 +8,7 @@ class i2c_switch(i2c):
i2c.__init__(self,config)
self.SWaddr=config['devreg'][0]['addr']
self.CurrentChannel=0
- self.NoSwitch=False;
+ self.NoSwitch=self.SWaddr==0;
logging.info("i2c switch at address "+str(self.SWaddr))
if self.NoSwitch:
logging.warn("i2c switch disabled!")
diff --git a/i2cserv/i2cbitbang1.py b/i2cserv/i2cbitbang1.py
index 8aacf743f7fe6f395dfdfb6ab6d1fc7238da1bbb..ea1adfe7e692eac90d15c682682b06a3c4a97804 100644
--- a/i2cserv/i2cbitbang1.py
+++ b/i2cserv/i2cbitbang1.py
@@ -2,146 +2,143 @@ from enum import Enum
import logging
import numpy as np
from .hwdev import hwdev
+import time
#This is copy of spibitbang. Need to be updated!!
class SPIBB_pins(Enum):
CLK = 0
- SDIO = 1
- SDIOdir = 2
- CS = 3
+ SDA = 1
+ SDAdir = 2
class i2cbitbang1(hwdev):
def __init__(self,config):
hwdev.__init__(self,config)
- logging.info("i2cbitbang todo")
def i2csetget(self,addr,data,reg=None,read=0):
- logging.info("i2cbitbang todo")
+# print("I2Cbbset",addr,data,reg,read);
+ if read==0:
+ if not(reg is None):
+ if reg>255: data=[reg//256,reg%256]+data;
+ else: data=[reg]+data;
+ return self.SetI2Cbb(addr,data)
+ if read==2: return self.SetI2Cbb(addr,data)
+ elif read==1:
+ if not(reg is None):
+ if reg>255: reg=[reg//256,reg%256];
+ else: reg=[reg];
+ self.SetI2Cbb(addr,reg)
+ return self.GetI2Cbb(addr,data)
+ elif read==3:
+ time.sleep(data[0]/1000);
+ return True
+ else: logging.warn("Not implemented!")
return False;
-def SetSPIbb(SetI2C,RCUi,dev,value):
- ADC_address=dev.Register_W
- CSdev=dev.Addr.devs[SPIBB_pins.CS.value]
- CSpin=dev.Addr.pins[SPIBB_pins.CS.value]
- SDOdev=dev.Addr.devs[SPIBB_pins.SDIO.value]
- SDOpin=dev.Addr.pins[SPIBB_pins.SDIO.value]
- CLKdev=dev.Addr.devs[SPIBB_pins.CLK.value]
- CLKpin=dev.Addr.pins[SPIBB_pins.CLK.value]
+ def SetI2Cbb(self,address,value):
+ SDAdev=self.conf['devreg'][SPIBB_pins.SDA.value]
+ SDApin=self.conf['parameters'][SPIBB_pins.SDA.value]
+ CLKdev=self.conf['devreg'][SPIBB_pins.CLK.value]
+ CLKpin=self.conf['parameters'][SPIBB_pins.CLK.value]
+ DIRdev=self.conf['devreg'][SPIBB_pins.SDAdir.value]
+ DIRpin=self.conf['parameters'][SPIBB_pins.SDAdir.value]
+ SetI2C=self.conf['parentcls'].SetVarValue
+ GetI2C=self.conf['parentcls'].GetVarValue
- logging.info(str(("SPIbb set",ADC_address,value)))
- ADC_bytes = 0x00
- ADC_rw = 0x00 # 0 for write, 1 for read
- data2 = ( ADC_rw << 23 ) + ( ADC_bytes << 21 ) + ( ADC_address << 8 ) + value[0]
-
- bit_array = "{0:{fill}24b}".format(data2, fill='0')
- # print(bit_array)
- SetI2C(RCUi,CSdev,1,CSpin,[0]) #enable
- for bit in bit_array:
- SetI2C(RCUi,SDOdev,1,SDOpin,[int(bit)])
- SetI2C(RCUi,CLKdev,1,CLKpin,[1])
- SetI2C(RCUi,CLKdev,1,CLKpin,[0])
- SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
- SetI2C(RCUi,SDOdev,1,SDOpin,[1]) #high when finished
- return True;
-
-def GetSPIbb(SetI2C,GetI2C,RCUi,dev,value):
- ADC_reg_address=dev.Register_R
- CSdev=dev.Addr.devs[Vars.SPIBB_pins.CS.value]
- CSpin=dev.Addr.pins[Vars.SPIBB_pins.CS.value]
- SDOdev=dev.Addr.devs[Vars.SPIBB_pins.SDIO.value]
- SDOpin=dev.Addr.pins[Vars.SPIBB_pins.SDIO.value]
- CLKdev=dev.Addr.devs[Vars.SPIBB_pins.CLK.value]
- CLKpin=dev.Addr.pins[Vars.SPIBB_pins.CLK.value]
- SDIOdirdev=dev.Addr.devs[Vars.SPIBB_pins.SDIOdir.value]
- SDIOdirpin=dev.Addr.pins[Vars.SPIBB_pins.SDIOdir.value]
-
- logging.info(str(("SPIbb get",ADC_reg_address)))
-
- ADC_bytes = 0x00
- ADC_rw = 0x01 # 0 for write, 1 for read
+# ADC_address=dev.Register_W<<1; #Write
+ ADC_address=address<<1;#dev.Register_W<<1; #Write
+ logging.info(str(("I2Cbb set",hex(ADC_address),value)))
- data = ( ADC_rw << 15) + ( ADC_bytes << 13 ) + ADC_reg_address
-
- SetI2C(RCUi,CSdev,1,CSpin,[0]) #enable
-
-
- bit_array = "{0:{fill}16b}".format(data, fill='0')
- for bit in bit_array:
- SetI2C(RCUi,SDOdev,1,SDOpin,[int(bit)])
- SetI2C(RCUi,CLKdev,1,CLKpin,[1])
- SetI2C(RCUi,CLKdev,1,CLKpin,[0])
-
- SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
-
- # print("read byte")
- SetI2C(RCUi,SDIOdirdev,1,SDIOdirpin,[1]) #input
- SetI2C(RCUi,CSdev,1,CSpin,[0]) #enable
- a=[0]
- N=len(value)
- for i in range(N): value[i]=0
- for cnt in range(8*(ADC_bytes+1)):
- ret_value=GetI2C(RCUi,SDOdev,1,SDOpin) #enable
- for i in range(N): value[i]=(value[i]<<1)+ ret_value[i]
- SetI2C(RCUi,CLKdev,1,CLKpin,[1])
- SetI2C(RCUi,CLKdev,1,CLKpin,[0]) #read after falling edge
- SetI2C(RCUi,CSdev,1,CSpin,[1]) #disable
- SetI2C(RCUi,SDIOdirdev,1,SDIOdirpin,[0]) #output
- return True;
-
-def GetSPIbb2(SetI2C,GetI2C,RCUi,SPIdev,I2Cdev,I2Cpins,value):
-#Read 3 SPI devices in parallel from same IOexpander
- ADC_reg_address=SPIdev[0].Register_R
- Nv=len(SPIdev)
- def Setbit(pintype,value):
- for i in range(1,Nv):
- SetI2C(RCUi,I2Cdev[i][pintype],1,I2Cpins[i][pintype],[value],buffer=True)
- SetI2C(RCUi,I2Cdev[0][pintype],1,I2Cpins[0][pintype],[value])
- def Getbit(pintype):
- print("N=",Nv,len(value))
- retvalue=np.zeros_like(value)
- retvalue[0::Nv]=GetI2C(RCUi,I2Cdev[0][pintype],1,I2Cpins[0][pintype])
- for i in range(1,Nv):
- retvalue[i::Nv]=GetI2C(RCUi,I2Cdev[i][pintype],1,I2Cpins[i][pintype],buffer=True)
- return retvalue
-
- CLK=0
- SDIO=1
- SDIOdir=2
- CS=3
-
- logging.debug(str(("SPIbb get",ADC_reg_address)))
-
- ADC_bytes = 0x00
- ADC_rw = 0x01 # 0 for write, 1 for read
+ SetI2C(DIRdev,1,DIRpin,[1]) #Input = high
+ SetI2C(CLKdev,1,CLKpin,[1]) #Should be high
+ #start
+ SetI2C(SDAdev,1,SDApin,[0]) #Output = low
+ SetI2C(DIRdev,1,DIRpin,[0]) #Output = low
+ SetI2C(CLKdev,1,CLKpin,[0])
+ ack=[0];
+ def TXbyte(b):
+ for bit in "{0:{fill}8b}".format(b, fill='0'):
+ SetI2C(DIRdev,1,DIRpin,[int(bit)])
+ SetI2C(CLKdev,1,CLKpin,[1])
+ SetI2C(CLKdev,1,CLKpin,[0])
+ SetI2C(DIRdev,1,DIRpin,[1]) #input
+# GetI2C(SDAdev,1,SDApin,ack)
+# print("Ack=",ack[0]);
+ SetI2C(CLKdev,1,CLKpin,[1])
+ GetI2C(SDAdev,1,SDApin,ack)
+# print("Ack=",ack[0]);
+ SetI2C(CLKdev,1,CLKpin,[0])
+ return ack[0];
+
+ TXbyte(ADC_address);
+ for v in value:
+ TXbyte(v);
+ #stop
+ SetI2C(DIRdev,1,DIRpin,[0]) #low
+ SetI2C(CLKdev,1,CLKpin,[1]) #Should be high
+ SetI2C(DIRdev,1,DIRpin,[1]) #Input = high
- data = ( ADC_rw << 15) + ( ADC_bytes << 13 ) + ADC_reg_address
- Setbit(CLK,0)
-
- Setbit(CS,0) #enable
-
- bit_array = "{0:{fill}16b}".format(data, fill='0')
- logging.debug(str(("SPI TX",bit_array)))
- for bit in bit_array:
- Setbit(CLK,0)
- Setbit(SDIO,int(bit))
- Setbit(CLK,1)
+ return True;
-# Setbit(CS,1) #disable
- Setbit(SDIOdir,1) #input
- Setbit(CLK,0)
+ def GetI2Cbb(self,reg_address,value):
+ SDAdev=self.conf['devreg'][SPIBB_pins.SDA.value]
+ SDApin=self.conf['parameters'][SPIBB_pins.SDA.value]
+ CLKdev=self.conf['devreg'][SPIBB_pins.CLK.value]
+ CLKpin=self.conf['parameters'][SPIBB_pins.CLK.value]
+ DIRdev=self.conf['devreg'][SPIBB_pins.SDAdir.value]
+ DIRpin=self.conf['parameters'][SPIBB_pins.SDAdir.value]
+ SetI2C=self.conf['parentcls'].SetVarValue
+ GetI2C=self.conf['parentcls'].GetVarValue
+
+
+ ADC_address=1+(reg_address<<1); #Read
+ logging.info(str(("I2Cbb get",hex(ADC_address),value)))
+
+ SetI2C(DIRdev,1,DIRpin,[1]) #Input = high
+ SetI2C(CLKdev,1,CLKpin,[1]) #Should be high
+ #start
+ SetI2C(SDAdev,1,SDApin,[0]) #Output = low
+ SetI2C(DIRdev,1,DIRpin,[0]) #Output = low
+ SetI2C(CLKdev,1,CLKpin,[0])
+ ack=[0];
+ def TXbyte(b):
+ for bit in "{0:{fill}8b}".format(b, fill='0'):
+ SetI2C(DIRdev,1,DIRpin,[int(bit)])
+ SetI2C(CLKdev,1,CLKpin,[1])
+ SetI2C(CLKdev,1,CLKpin,[0])
+ SetI2C(DIRdev,1,DIRpin,[1]) #input
+# GetI2C(SDAdev,1,SDApin,ack)
+# print("Ack=",ack[0]);
+ SetI2C(CLKdev,1,CLKpin,[1])
+ GetI2C(SDAdev,1,SDApin,ack)
+# print("Ack=",ack[0]);
+ SetI2C(SDAdev,1,SDApin,[0])
+ SetI2C(CLKdev,1,CLKpin,[0])
+ return ack[0];
+
+ def RXbyte(last=False):
+ b=0;
+ for i in range(8):
+ SetI2C(CLKdev,1,CLKpin,[1])
+ GetI2C(SDAdev,1,SDApin,ack)
+# print(ack[0])
+ b=(b<<1)+ack[0];
+ SetI2C(CLKdev,1,CLKpin,[0])
+# print("RXbyte",hex(b));
+ SetI2C(SDAdev,1,SDApin,[0])
+ SetI2C(DIRdev,1,DIRpin,[1 if last else 0]) #outout = low = ack
+ SetI2C(CLKdev,1,CLKpin,[1])
+ SetI2C(CLKdev,1,CLKpin,[0])
+ SetI2C(DIRdev,1,DIRpin,[1])
+ return b;
+
+ TXbyte(ADC_address);
+ print("si status:",hex(RXbyte()))#should be 0x80
+ for i in range(len(value)):
+ value[i]=RXbyte(last=(i==len(value)-1))
+ #stop
+ #SetI2C(DIRdev,1,DIRpin,[0]) #low
+ SetI2C(CLKdev,1,CLKpin,[1]) #Should be high
+ SetI2C(DIRdev,1,DIRpin,[1]) #Input = high
- # print("read byte")
-# Setbit(CS,0) #enable
- a=[0]
- N=len(value)
- for i in range(N): value[i]=0
- for cnt in range(8*(ADC_bytes+1)):
- ret_value=Getbit(SDIO)
- for i in range(N): value[i]=(value[i]<<1)+ ret_value[i]
- Setbit(CLK,1)
- Setbit(CLK,0) #read after falling edge
- Setbit(CS,1) #disable
- Setbit(SDIO,1)#High when finished
- Setbit(SDIOdir,0) #output
return True;
\ No newline at end of file
diff --git a/log.txt b/log.txt
new file mode 100644
index 0000000000000000000000000000000000000000..71156f50a3ec5dff55b1112e09a980860fe23f56
--- /dev/null
+++ b/log.txt
@@ -0,0 +1,8 @@
+ID= ['0x0', '0x81', '0x3a', '0x24']
+Frequency set= 150000000
+['0x8', '0xf0', '0xd1', '0x80']
+si status: 0x80
+si status: 0x80
+si status: 0x80
+Frequency read back= 150000000
+['0x8', '0xf0', '0xd1', '0x80', '0x8', '0xf0', '0xd1', '0x80', '0x8', '0xf0', '0xd1', '0x80', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0', '0x0']
diff --git a/testRCUL.py b/testRCUL.py
new file mode 100644
index 0000000000000000000000000000000000000000..f9f3525492baa6667ceea1d6c2fa56fbe1b80d4d
--- /dev/null
+++ b/testRCUL.py
@@ -0,0 +1,168 @@
+import logging
+import argparse
+from opcuaserv import opcuaserv
+from opcuaserv import i2client
+from opcuaserv import yamlreader
+#from opcuaserv import pypcc2
+from i2cserv import i2cthread
+import threading
+import time
+import sys
+import signal
+from yamlconfig import Find;
+import yamlconfig as yc
+
+logging.basicConfig(level="WARNING",format='%(asctime)s [%(levelname)-8s,%(filename)-20s:%(lineno)-3d] %(message)s')
+
+RunTimer=True;
+#def signal_handler(sig, frame):
+# logging.warn('Stop signal received!')
+# global RunTimer;
+# RunTimer=False
+#signal.signal(signal.SIGINT, signal_handler)
+
+#logging.info("Start I2C processes")
+#threads=[]
+#I2Cclients=[]
+name='RCUL'
+#RCU_I2C=i2client.i2client(name=name)
+
+conf=yc.yamlconfig(name)
+conf.linkdevices()
+conf.loaddrivers()
+conf.linkdrivers()
+
+def GetVal(name,N=1):
+ varid=conf.getvarid(name);
+ var1=conf.getvars()[varid]
+ drv=var1.get('drivercls');
+ mask=[True]*N+[False]*((32-1)*N);
+ data=drv.OPCUAReadVariable(varid,var1,mask)
+ return data[0].data,var1
+
+data,var1=GetVal('RCU_ID');
+print("ID=",[hex(d) for d in data[:4]]);
+
+if False:
+ data,var1=GetVal('RCU_temperature');
+ D=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ print("Temp=",D,"K")
+ if (D<290) or (D>350): exit()
+
+ data,var1=GetVal('RCU_3V3');
+ D=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ print("3V3=",D,"V")
+ if (D<3.2) or (D>3.4): exit()
+#print("data=",[hex(d) for d in data[:3]]);
+
+
+def SetRegister(regname,value):
+ methodid=conf.getmethodid("RCU_on");
+ var1=conf.getmethod(methodid)
+ drv=var1.get('drivercls');
+ v1=conf.getdevreg(regname)
+ drv2=v1.get('drivercls')
+ mask=[True]+[False]*31;
+ if drv: drv.Setdevreg(v1,value,mask)
+ elif drv2: drv2.Setdevreg(v1,value,mask)
+ else: logging.warn("Driver not specified for instruction"+key)
+
+if False:
+ SetRegister("IO1.GPIO1",[0])
+ SetRegister("IO1.GPIO2",[0x80]) #Analog power on
+ SetRegister("IO2.GPIO1",[0x40]) #Digital power on
+ SetRegister("IO2.GPIO2",[0])
+
+ SetRegister("IO1.CONF1",[0])
+ SetRegister("IO1.CONF2",[0])
+ SetRegister("IO2.CONF1",[0x80]) #Pgood on P07
+ SetRegister("IO2.CONF2",[0])
+
+ print("IO expander status:");
+ data,var=GetVal('RCU_IO1_GPIO1');print("IO1_1",hex(data[0]))
+ data,var=GetVal('RCU_IO1_GPIO2');print("IO1_2",hex(data[0]))
+ data,var=GetVal('RCU_IO2_GPIO1');print("IO2_1",hex(data[0]))
+ data,var=GetVal('RCU_IO2_GPIO2');print("IO2_2",hex(data[0]))
+
+if False:
+ data,var1=GetVal('RCU_1V8');
+ D=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ print("1V8=",D,"")
+
+ data,var1=GetVal('RCU_2V5');
+ D=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ print("2V5=",D,"")
+
+if False:
+ data,var1=GetVal('ANT_Vin');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Vant_in=",D0,D1,D2)
+
+# SetRegister("IO1.GPIO1",[0xC0]) #Antenna power on
+# SetRegister("IO1.GPIO2",[0xC0]) #Analog power on
+
+ data,var1=GetVal('ANT_Vout');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Vant_out=",D0,D1,D2)
+
+ data,var1=GetVal('ANT_I');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Iant=",D0,D1,D2)
+
+if False:
+ SetRegister("IO3.GPIO1",[0x15]) #ADC_SDIO=high, clk=low, DTH_EN=low
+ SetRegister("IO3.GPIO2",[0x47]) #ADC SC=high, DTH_SDA=high
+ SetRegister("IO3.CONF1",[0]) #All output
+ SetRegister("IO3.CONF2",[0])
+ data,var=GetVal('RCU_IO3_GPIO1');print("IO3_1",hex(data[0]))
+ data,var=GetVal('RCU_IO3_GPIO2');print("IO3_2",hex(data[0]))
+
+if False:
+ #Test reading register from ADCs
+ data,var=GetVal('RCU_ADC_JESD');print("ADC JESD",[hex(d) for d in data[:3]])
+
+ #Test writing ADC register
+ SetRegister("ADC1.SYNC_control",[1])
+ SetRegister("ADC1.Update",[1])
+ data,var=GetVal('RCU_ADC_sync');print("ADC sync",[hex(d) for d in data[:3]])
+
+#Need to update I2c bitbang....
+if True:
+ SetRegister("IO3.GPIO1",[0x15]) #ADC_SDIO=high, clk=low, DTH_SDN=low
+ SetRegister("IO3.GPIO2",[0x3F]) #ADC SC=high, DTH_SDA=low, DTH_CLK=high
+ SetRegister("IO3.CONF1",[0]) #All output
+ SetRegister("IO3.CONF2",[0x40]) #DTH_SDA=input
+
+# data,var=GetVal('RCU_IO3_GPIO1');print("IO3_1",hex(data[0]))
+# data,var=GetVal('RCU_IO3_GPIO2');print("IO3_2",hex(data[0]))
+ f=int(150e6)
+ print("Frequency set=",f)
+ d=[0]*4;
+ for i in range(4):
+ d[3-i]=f%256;f//=256
+# print([hex(h) for h in d])
+ SetRegister("DTH1.Freq",d) #DTH_SDA=input
+
+ data,var1=GetVal("RCU_DTH_freq")
+# data,var1=GetVal("RCU_DTH_Rev")
+ f=0;
+ for i in range(4):
+ f=f*256+data[i];
+ print("Frequency read back=",f)
+# print([hex(h) for h in data[:30]])
+
+
+#print(data)
+#scale=float(scale)
+#data2=[(d*scale) for d in data2]
+
+#print("ID=",[hex(d) for d in data[:4]]);
+
+
+
diff --git a/testRCUL_on.py b/testRCUL_on.py
new file mode 100644
index 0000000000000000000000000000000000000000..1ffe1efc477a287c8f4026c07a86414dd365898b
--- /dev/null
+++ b/testRCUL_on.py
@@ -0,0 +1,204 @@
+import logging
+import argparse
+from opcuaserv import opcuaserv
+from opcuaserv import i2client
+from opcuaserv import yamlreader
+#from opcuaserv import pypcc2
+from i2cserv import i2cthread
+import threading
+import time
+import sys
+import signal
+from yamlconfig import Find;
+import yamlconfig as yc
+
+logging.basicConfig(level="WARNING",format='%(asctime)s [%(levelname)-8s,%(filename)-20s:%(lineno)-3d] %(message)s')
+RCU=5
+#Gain=0; #15dB
+#Gain=0x0a; #5dB
+#Gain=0xf; #0dB
+#Gain=0x15; #-6dB
+#Gain=[0x00,0xf,0x00]
+Gain=[0x15,0x15,0x15]
+print("Power on RCU=",RCU);
+RunTimer=True;
+#def signal_handler(sig, frame):
+# logging.warn('Stop signal received!')
+# global RunTimer;
+# RunTimer=False
+#signal.signal(signal.SIGINT, signal_handler)
+
+#logging.info("Start I2C processes")
+#threads=[]
+#I2Cclients=[]
+name='RCUL'
+#RCU_I2C=i2client.i2client(name=name)
+
+conf=yc.yamlconfig(name)
+conf.linkdevices()
+conf.loaddrivers()
+conf.linkdrivers()
+
+def GetVal(name,N=1):
+ varid=conf.getvarid(name);
+ var1=conf.getvars()[varid]
+ drv=var1.get('drivercls');
+ mask=[False]*((32)*N);
+ mask[RCU]=True;
+ data=drv.OPCUAReadVariable(varid,var1,mask)
+ return data[0].data,var1
+
+data,var1=GetVal('RCU_ID');
+#print(data);
+i=RCU*4;
+print("ID=",[hex(d) for d in data[i:i+4]]);
+
+if True:
+ data,var1=GetVal('RCU_temperature');
+# print(data);
+ i=RCU*3;
+ D=((data[i]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ print("Temp=",D,"K")
+ if (D<290) or (D>350): exit()
+
+ data,var1=GetVal('RCU_3V3');
+ D=((data[i]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ print("3V3=",D,"V")
+ if (D<3.2) or (D>3.4): exit()
+#print("data=",[hex(d) for d in data[:3]]);
+
+
+def SetRegister(regname,value):
+ methodid=conf.getmethodid("RCU_on");
+ var1=conf.getmethod(methodid)
+ drv=var1.get('drivercls');
+ v1=conf.getdevreg(regname)
+ drv2=v1.get('drivercls')
+ mask=[False]*32;
+ mask[RCU]=True;
+ if drv: drv.Setdevreg(v1,value,mask)
+ elif drv2: drv2.Setdevreg(v1,value,mask)
+ else: logging.warn("Driver not specified for instruction"+key)
+
+if True:
+# AntPower=0xC0
+ SetRegister("IO1.GPIO1",[Gain[0]])
+ SetRegister("IO1.GPIO2",[0x80+Gain[1]]) #Analog power on
+# SetRegister("IO1.GPIO1",[0xC0+Gain])
+# SetRegister("IO1.GPIO2",[0xC0+Gain]) #Analog power on
+ SetRegister("IO2.GPIO1",[0x40+Gain[2]]) #Digital power on
+# SetRegister("IO1.GPIO2",[0x00]) #Analog power off
+# SetRegister("IO2.GPIO1",[0x00]) #Digital power off
+ SetRegister("IO2.GPIO2",[0x15]) #Band select all band0, leds on (low) 10MHz
+# SetRegister("IO2.GPIO2",[0x2a]) #Band select all band1, leds on (low) 30MHz
+# SetRegister("IO2.GPIO2",[0x00]) #
+
+ SetRegister("IO1.CONF1",[0])
+ SetRegister("IO1.CONF2",[0])
+ SetRegister("IO2.CONF1",[0x80]) #Pgood on P07
+ SetRegister("IO2.CONF2",[0])
+
+ print("IO expander status:");
+ data,var=GetVal('RCU_IO1_GPIO1');print("IO1_1",hex(data[RCU]))
+ data,var=GetVal('RCU_IO1_GPIO2');print("IO1_2",hex(data[RCU]))
+ data,var=GetVal('RCU_IO2_GPIO1');print("IO2_1",hex(data[RCU]))
+ data,var=GetVal('RCU_IO2_GPIO2');print("IO2_2",hex(data[RCU]))
+
+if True:
+ i=RCU*3;
+ data,var1=GetVal('RCU_1V8');
+ D=((data[i]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ print("1V8=",D,"")
+ if (D<1.6) or (D>2.0): exit()
+
+ data,var1=GetVal('RCU_2V5');
+ D=((data[i]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ print("2V5=",D,"")
+#exit()
+if False:
+ data,var1=GetVal('ANT_Vin');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Vant_in=",D0,D1,D2)
+
+
+# SetRegister("IO1.GPIO1",[0xC0]) #Antenna power on
+# SetRegister("IO1.GPIO2",[0xC0]) #Analog power on
+
+ data,var1=GetVal('ANT_Vout');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Vant_out=",D0,D1,D2)
+
+ data,var1=GetVal('ANT_I');
+ D0=((data[0]*256+data[1])*256+data[2])*var1.get('scale',1.)
+ D1=((data[3]*256+data[4])*256+data[5])*var1.get('scale',1.)
+ D2=((data[6]*256+data[7])*256+data[8])*var1.get('scale',1.)
+ print("Iant=",D0,D1,D2)
+
+print("Setup ADC")
+if True:
+ SetRegister("IO3.GPIO1",[0x15]) #ADC_SDIO=high, clk=low, DTH_EN=low
+ SetRegister("IO3.GPIO2",[0x47]) #ADC SC=high, DTH_SDA=high
+ SetRegister("IO3.CONF1",[0]) #All output
+ SetRegister("IO3.CONF2",[0])
+ data,var=GetVal('RCU_IO3_GPIO1');print("IO3_1",hex(data[RCU]))
+ data,var=GetVal('RCU_IO3_GPIO2');print("IO3_2",hex(data[RCU]))
+# data,var=GetVal('RCU_ADC_sync');print("ADC sync",[hex(d) for d in data[RCU*3:RCU*3+3]])
+ if True:
+ #Test writing ADC register
+
+ SetRegister("ADC1.SYNC_control",[1])
+ SetRegister("ADC1.JESD_control1",[0x14])
+ SetRegister("ADC1.CML_level",[0x7])
+# SetRegister("ADC1.Offset",[0x0])
+ SetRegister("ADC1.Update",[1])
+
+ SetRegister("ADC2.SYNC_control",[1])
+ SetRegister("ADC2.JESD_control1",[0x14])
+ SetRegister("ADC2.CML_level",[0x7])
+# SetRegister("ADC2.Offset",[0x0])
+ SetRegister("ADC2.Update",[1])
+
+ SetRegister("ADC3.SYNC_control",[1])
+ SetRegister("ADC3.JESD_control1",[0x14])
+ SetRegister("ADC3.CML_level",[0x7])
+# SetRegister("ADC3.Offset",[0x0])
+ SetRegister("ADC3.Update",[1])
+
+if True:
+ data,var=GetVal('RCU_ADC_sync'); print("ADC sync",[hex(d) for d in data[RCU*3:RCU*3+3]])
+ data,var1=GetVal("RCU_ADC_lock");print("ADC lock",[hex(d) for d in data[RCU*3:RCU*3+3]])
+ data,var1=GetVal("RCU_ADC_CML_level");print("CML level",[hex(d) for d in data[RCU*3:RCU*3+3]])
+
+
+if True:
+ print("Switch antenna voltages on")
+# SetRegister("IO1.GPIO1",[0xC0]) #Antenna power on
+# SetRegister("IO1.GPIO2",[0xC0]) #Analog power on
+ SetRegister("IO1.GPIO1",[0xC0+Gain[0]])
+ SetRegister("IO1.GPIO2",[0xC0+Gain[1]]) #Analog power on
+
+ data,var1=GetVal('ANT_Vin');
+ i=RCU*9;
+ D0=((data[i+0]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ D1=((data[i+3]*256+data[i+4])*256+data[i+5])*var1.get('scale',1.)
+ D2=((data[i+6]*256+data[i+7])*256+data[i+8])*var1.get('scale',1.)
+ print("Vant_in=",D0,D1,D2)
+
+
+ data,var1=GetVal('ANT_Vout');
+ D0=((data[i+0]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ D1=((data[i+3]*256+data[i+4])*256+data[i+5])*var1.get('scale',1.)
+ D2=((data[i+6]*256+data[i+7])*256+data[i+8])*var1.get('scale',1.)
+ print("Vant_out=",D0,D1,D2)
+
+ data,var1=GetVal('ANT_I');
+ D0=((data[i+0]*256+data[i+1])*256+data[i+2])*var1.get('scale',1.)
+ D1=((data[i+3]*256+data[i+4])*256+data[i+5])*var1.get('scale',1.)
+ D2=((data[i+6]*256+data[i+7])*256+data[i+8])*var1.get('scale',1.)
+ print("Iant=",D0,D1,D2)
+
+